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author | Kenneth Graunke <[email protected]> | 2019-08-26 15:21:40 -0700 |
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committer | Kenneth Graunke <[email protected]> | 2019-08-27 14:20:07 -0700 |
commit | c8c9c4868429f98e77f782637568e9eed2dd33f9 (patch) | |
tree | 76e5d8e1d927b7bc872a4979a2a4df65d6d882cd /scons/crossmingw.py | |
parent | 360cf3c4b05679709574ef4d20b5097b0fd0be82 (diff) |
intel/compiler: Fix src0/desc setter ordering
src0 vstride and type overlap with bits of the extended descriptor.
brw_set_desc() also sets the extended descriptor to 0. So by setting
the descriptor, then setting src0, we were accidentally setting a bunch
of extended descriptor bits unintentionally.
When using this infrastructure for framebuffer writes (in a future
patch), this ended up setting the extended descriptor bit 20, which is
"Null Render Target" on Icelake, causing nothing to be written to the
framebuffer.
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'scons/crossmingw.py')
0 files changed, 0 insertions, 0 deletions