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authorRoland Scheidegger <[email protected]>2007-11-15 01:13:16 +0100
committerRoland Scheidegger <[email protected]>2007-11-15 01:13:16 +0100
commit96ba38a450b77d56730fd293499cbeaa1f511507 (patch)
treee68d2b72d3866ffcc37e203eb96671f6b1ddeca5 /progs/demos/Windows/tunnel.dsp
parentdab7c810e99e8fd2a7c8ba5cdbdc2fb6502647b3 (diff)
fix bogus assumption if ddx has set up surface reg for z buffer
this is wrong since even if ddx has not set up a surface reg to cover the z buffer we should pretend it has on those rv100 chips since they presumably do not do z buffer tiling if not using hyperz, so we can use linear addressing just the same. Doesn't seem to fix #13080, but it's wrong anyway and the bug almost certainly broke newer non-tcl chips.
Diffstat (limited to 'progs/demos/Windows/tunnel.dsp')
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