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author | Francisco Jerez <[email protected]> | 2019-08-22 17:52:11 -0700 |
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committer | Francisco Jerez <[email protected]> | 2019-10-11 12:24:16 -0700 |
commit | 7e5a8638d3a2a3b0fdd71be196ce241714827dd6 (patch) | |
tree | 6a1ec88152ca46dcdc384f0e3c585f9c81b3a0ed /meson.build | |
parent | 6965a02e09de2d31e5fa951ffa2ae401b2197fb1 (diff) |
intel/eu/gen12: Extend brw_inst.h macros for Gen12 support.
The encoding of almost every instruction field has changed in Gen12,
so this involves adding a Gen12+ bitfield spec to every brw_inst
macro. In addition some new macros are required to handle certain
discontiguous and variable-length fields.
This commit doesn't actually include the Gen12 updated bitfield specs,
only the macros are extended here for reviewability.
Reviewed-by: Jordan Justen <[email protected]>
Reviewed-by: Kenneth Graunke <[email protected]>
v2: Rename FDC() to FFDC() and FDC1() to FDC() for consistency with
the existing F() and FF() macros.
Diffstat (limited to 'meson.build')
0 files changed, 0 insertions, 0 deletions