diff options
author | Jason Ekstrand <[email protected]> | 2015-11-03 15:45:04 -0800 |
---|---|---|
committer | Jason Ekstrand <[email protected]> | 2015-11-03 15:45:04 -0800 |
commit | b00e3f221b3f6dd0e87697c53331fd033b6e8676 (patch) | |
tree | a59dfeca8fd404c65da59a663e0abda301e893a2 /include | |
parent | a1e7b8701a4687f29b013364a852aa773c80f960 (diff) | |
parent | 5d4b019d2a6d4deb4db11780618515cf1fa8a4fc (diff) |
Merge remote-tracking branch 'mesa-public/master' into vulkan
Diffstat (limited to 'include')
-rw-r--r-- | include/GL/internal/dri_interface.h | 11 | ||||
-rw-r--r-- | include/pci_ids/i965_pci_ids.h | 38 | ||||
-rw-r--r-- | include/pci_ids/radeonsi_pci_ids.h | 2 |
3 files changed, 35 insertions, 16 deletions
diff --git a/include/GL/internal/dri_interface.h b/include/GL/internal/dri_interface.h index a0f155a1f42..6bbd3fa87f5 100644 --- a/include/GL/internal/dri_interface.h +++ b/include/GL/internal/dri_interface.h @@ -495,7 +495,7 @@ struct __DRIdamageExtensionRec { * SWRast Loader extension. */ #define __DRI_SWRAST_LOADER "DRI_SWRastLoader" -#define __DRI_SWRAST_LOADER_VERSION 2 +#define __DRI_SWRAST_LOADER_VERSION 3 struct __DRIswrastLoaderExtensionRec { __DRIextension base; @@ -528,6 +528,15 @@ struct __DRIswrastLoaderExtensionRec { void (*putImage2)(__DRIdrawable *drawable, int op, int x, int y, int width, int height, int stride, char *data, void *loaderPrivate); + + /** + * Put image to drawable + * + * \since 3 + */ + void (*getImage2)(__DRIdrawable *readable, + int x, int y, int width, int height, int stride, + char *data, void *loaderPrivate); }; /** diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h index 8a425999429..5891ba67ea4 100644 --- a/include/pci_ids/i965_pci_ids.h +++ b/include/pci_ids/i965_pci_ids.h @@ -109,21 +109,29 @@ CHIPSET(0x162A, bdw_gt3, "Intel(R) Iris Pro P6300 (Broadwell GT3e)") CHIPSET(0x162B, bdw_gt3, "Intel(R) Iris 6100 (Broadwell GT3)") CHIPSET(0x162D, bdw_gt3, "Intel(R) Broadwell GT3") CHIPSET(0x162E, bdw_gt3, "Intel(R) Broadwell GT3") -CHIPSET(0x1902, skl_gt1, "Intel(R) Skylake DT GT1") -CHIPSET(0x1906, skl_gt1, "Intel(R) Skylake ULT GT1") -CHIPSET(0x190A, skl_gt1, "Intel(R) Skylake SRV GT1") -CHIPSET(0x190B, skl_gt1, "Intel(R) Skylake Halo GT1") -CHIPSET(0x190E, skl_gt1, "Intel(R) Skylake ULX GT1") -CHIPSET(0x1912, skl_gt2, "Intel(R) Skylake DT GT2") -CHIPSET(0x1916, skl_gt2, "Intel(R) Skylake ULT GT2") -CHIPSET(0x191A, skl_gt2, "Intel(R) Skylake SRV GT2") -CHIPSET(0x191B, skl_gt2, "Intel(R) Skylake Halo GT2") -CHIPSET(0x191D, skl_gt2, "Intel(R) Skylake WKS GT2") -CHIPSET(0x191E, skl_gt2, "Intel(R) Skylake ULX GT2") -CHIPSET(0x1921, skl_gt2, "Intel(R) Skylake ULT GT2F") -CHIPSET(0x1926, skl_gt3, "Intel(R) Skylake ULT GT3") -CHIPSET(0x192A, skl_gt3, "Intel(R) Skylake SRV GT3") -CHIPSET(0x192B, skl_gt3, "Intel(R) Skylake Halo GT3") +CHIPSET(0x1902, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)") +CHIPSET(0x1906, skl_gt1, "Intel(R) HD Graphics 510 (Skylake GT1)") +CHIPSET(0x190A, skl_gt1, "Intel(R) Skylake GT1") +CHIPSET(0x190E, skl_gt1, "Intel(R) Skylake GT1") +CHIPSET(0x1912, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)") +CHIPSET(0x1913, skl_gt2, "Intel(R) Skylake GT2f") +CHIPSET(0x1915, skl_gt2, "Intel(R) Skylake GT2f") +CHIPSET(0x1916, skl_gt2, "Intel(R) HD Graphics 520 (Skylake GT2)") +CHIPSET(0x1917, skl_gt2, "Intel(R) Skylake GT2f") +CHIPSET(0x191A, skl_gt2, "Intel(R) Skylake GT2") +CHIPSET(0x191B, skl_gt2, "Intel(R) HD Graphics 530 (Skylake GT2)") +CHIPSET(0x191D, skl_gt2, "Intel(R) HD Graphics P530 (Skylake GT2)") +CHIPSET(0x191E, skl_gt2, "Intel(R) HD Graphics 515 (Skylake GT2)") +CHIPSET(0x1921, skl_gt2, "Intel(R) Skylake GT2") +CHIPSET(0x1923, skl_gt3, "Intel(R) Iris Graphics 540 (Skylake GT3e)") +CHIPSET(0x1926, skl_gt3, "Intel(R) HD Graphics 535 (Skylake GT3)") +CHIPSET(0x1927, skl_gt3, "Intel(R) Iris Graphics 550 (Skylake GT3e)") +CHIPSET(0x192A, skl_gt4, "Intel(R) Skylake GT4") +CHIPSET(0x192B, skl_gt3, "Intel(R) Iris Graphics (Skylake GT3fe)") +CHIPSET(0x1932, skl_gt4, "Intel(R) Skylake GT4") +CHIPSET(0x193A, skl_gt4, "Intel(R) Skylake GT4") +CHIPSET(0x193B, skl_gt4, "Intel(R) Skylake GT4") +CHIPSET(0x193D, skl_gt4, "Intel(R) Skylake GT4") CHIPSET(0x22B0, chv, "Intel(R) HD Graphics (Cherryview)") CHIPSET(0x22B1, chv, "Intel(R) HD Graphics (Cherryview)") CHIPSET(0x22B2, chv, "Intel(R) HD Graphics (Cherryview)") diff --git a/include/pci_ids/radeonsi_pci_ids.h b/include/pci_ids/radeonsi_pci_ids.h index 52eada1d3d5..bcf15a186c6 100644 --- a/include/pci_ids/radeonsi_pci_ids.h +++ b/include/pci_ids/radeonsi_pci_ids.h @@ -181,3 +181,5 @@ CHIPSET(0x9876, CARRIZO_, CARRIZO) CHIPSET(0x9877, CARRIZO_, CARRIZO) CHIPSET(0x7300, FIJI_, FIJI) + +CHIPSET(0x98E4, STONEY_, STONEY) |