summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorJordan Justen <[email protected]>2020-03-20 15:08:12 -0700
committerEric Engestrom <[email protected]>2020-03-25 15:35:02 +0100
commitfdd4beab686d968a5a787243c9476c0a88405745 (patch)
tree8935cfd1ad2d9c72e747135fce2ab070380c56fa /include
parentead58ae0c87c8908a6c188b2d2eae47fbd8dca73 (diff)
intel: Update TGL PCI strings
Ref: Bspec 44455 Cc: <[email protected]> Signed-off-by: Jordan Justen <[email protected]> Reviewed-by: Lionel Landwerlin <[email protected]> (cherry picked from commit 1c6ef0165f03a8e8c20a2c33a78584166a73487c)
Diffstat (limited to 'include')
-rw-r--r--include/pci_ids/iris_pci_ids.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/include/pci_ids/iris_pci_ids.h b/include/pci_ids/iris_pci_ids.h
index 42e5d675828..863a8f429a0 100644
--- a/include/pci_ids/iris_pci_ids.h
+++ b/include/pci_ids/iris_pci_ids.h
@@ -1,9 +1,9 @@
-CHIPSET(0x9A40, tgl_gt2, "TGL GT2", "Intel(R) Graphics")
-CHIPSET(0x9A49, tgl_gt2, "TGL GT2", "Intel(R) Graphics")
+CHIPSET(0x9A40, tgl_gt2, "TGL GT2", "Intel(R) Xe Graphics")
+CHIPSET(0x9A49, tgl_gt2, "TGL GT2", "Intel(R) Xe Graphics")
CHIPSET(0x9A59, tgl_gt2, "TGL GT2", "Intel(R) Graphics")
-CHIPSET(0x9A60, tgl_gt1, "TGL GT1", "Intel(R) Graphics")
-CHIPSET(0x9A68, tgl_gt1, "TGL GT1", "Intel(R) Graphics")
-CHIPSET(0x9A70, tgl_gt1, "TGL GT1", "Intel(R) Graphics")
+CHIPSET(0x9A60, tgl_gt1, "TGL GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9A68, tgl_gt1, "TGL GT1", "Intel(R) UHD Graphics")
+CHIPSET(0x9A70, tgl_gt1, "TGL GT1", "Intel(R) UHD Graphics")
CHIPSET(0x9AC0, tgl_gt2, "TGL GT2", "Intel(R) UHD Graphics")
CHIPSET(0x9AC9, tgl_gt2, "TGL GT2", "Intel(R) UHD Graphics")
CHIPSET(0x9AD9, tgl_gt2, "TGL GT2", "Intel(R) UHD Graphics")