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authorRob Clark <[email protected]>2018-08-11 10:30:38 -0400
committerRob Clark <[email protected]>2018-08-14 17:59:02 -0400
commit70bf639328fa00d7875e82b43fb011b0687559c0 (patch)
tree7223b9810efe9419c4ffaf59012178c508382d74 /include/pci_ids/i965_pci_ids.h
parent4813060ed4d1d59367b145a72786a92a2bc6c40e (diff)
freedreno/ir3: add support for a6xx 'merged' register set
Starting with a6xx, half and full precision registers conflict. Which makes things a bit more efficient, ie. if some parts of the shader are heavy on half-precision and others on full precision, you don't have to allocate the worst case for both. But it means we need to setup some additional conflicts. Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'include/pci_ids/i965_pci_ids.h')
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