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authorAnuj Phogat <[email protected]>2015-08-11 16:31:39 -0700
committerAnuj Phogat <[email protected]>2015-09-28 12:43:43 -0700
commit0fa39bff19dc2fbd3c184bd0e1267c86bd5040d9 (patch)
tree12678585b70f7095965349ee36fb95467f23f15d /doxygen
parente83b07aa7b124184decd68a64d970e8f408f8725 (diff)
i965: Fix {src, dst}_pitch alignment check for XY_SRC_COPY_BLT
Current code checks the alignment restrictions only for Y tiling. From Broadwell PRM vol 10: "pitch is of 512Byte granularity for Tile-X: This means the tiled-x surface pitch can be (512, 1024, 1536, 2048...)/4 (in Dwords)." This patch adds the restriction for X tiling as well. Signed-off-by: Anuj Phogat <[email protected]> Reviewed-by: Ben Widawsky <[email protected]> Reviewed-by: Chad Versace <[email protected]>
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