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author | Eric Anholt <[email protected]> | 2011-01-07 14:26:39 -0800 |
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committer | Eric Anholt <[email protected]> | 2011-01-07 14:35:42 -0800 |
commit | 1d1ad6306d0d55b6ba97d9ecc730d5f919d55df5 (patch) | |
tree | 0498a9579e69ce6386ec7a9b3ac4217aadb6bfce /docs | |
parent | 46a360b26a4d5e9ff8e00388605799ed60849a03 (diff) |
i965: Avoid double-negation of immediate values in the VS.
In general, we have to negate in immediate values we pass in because
the src1 negate field in the register description is in the bits3 slot
that the 32-bit value is loaded into, so it's ignored by the hardware.
However, the src0 negate field is in bits1, so after we'd negated the
immediate value loaded in, it would also get negated through the
register description. This broke this VP instruction in the position
calculation in civ4:
MAD TEMP[1], TEMP[1], CONST[256].zzzz, CONST[256].-y-y-y-y;
Bug #30156
Diffstat (limited to 'docs')
0 files changed, 0 insertions, 0 deletions