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authorKenneth Graunke <[email protected]>2013-11-26 00:30:19 -0800
committerIan Romanick <[email protected]>2013-11-28 08:37:40 -0800
commit44e38a878aef79b53dd10d45afeec7cc89729f80 (patch)
tree08f069d77d0fc0f92a6179c83ba24c06a669fa4b /docs
parent93dfd0522f1d7dcd908380ca6b12cff72b8a2be7 (diff)
i965: Always reserve binding table space for at least one render target.
In brw_update_renderbuffer_surfaces(), if there are no color draw buffers, we always set up a null render target at surface index 0 so we have something to use with the FB write marking the end of thread. However, when we recently began computing surface indexes dynamically, we failed to reserve space for it. This meant that the first texture would be assigned surface index 0, and our closing FB write would clobber the texture. Fixes Piglit's EXT_packed_depth_stencil/fbo-blit-d24s8 test on Gen4-5, which regressed as of commit 4e5306453da6a1c076309e543ec92d999e02f67a ("i965/fs: Dynamically set up the WM binding table offsets.") Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70605 Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Chris Forbes <[email protected]> Tested-by: lu hua <[email protected]> Cc: "10.0" [email protected] (cherry picked from commit c4815f6cd6f659acd361f1b4cf63473a46ca7de9)
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