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authorAndres Rodriguez <[email protected]>2017-10-20 18:42:13 -0400
committerBas Nieuwenhuizen <[email protected]>2017-10-21 01:15:54 +0200
commita2c6fbb3ee16a58a9098b031a6382618d570bee8 (patch)
tree03bd156ec4504db1eac4eefeb79e20910a16613e /docs
parenteff2bdbd8272ceec723dcc1643dd3d5f77020d1f (diff)
radv: disable implicit sync for radv allocated bos v3
Implicit sync kicks in when a buffer is used by two different amdgpu contexts simultaneously. Jobs that use explicit synchronization mechanisms end up needlessly waiting to be scheduled for long periods of time in order to achieve serialized execution. This patch disables implicit synchronization for all radv allocations except for wsi bos. The only systems that require implicit synchronization are DRI2/3 and PRIME. v2: mark wsi bos as RADV_MEM_IMPLICIT_SYNC v3: Add drm version check (Bas) Signed-off-by: Andres Rodriguez <[email protected]> Reviewed-by: Bas Nieuwenhuizen <[email protected]>
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