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| author | Eric Anholt <[email protected]> | 2014-02-25 12:15:31 -0800 |
|---|---|---|
| committer | Eric Anholt <[email protected]> | 2014-03-14 12:56:21 -0700 |
| commit | ea93246c009178b54848a7814a172164cd33d3c7 (patch) | |
| tree | 0e7ee83ba98781bf9cc72a81cce38365b7a3e13b /docs/specs/MESA_drm_image.spec | |
| parent | ff1e850eec7a18d2cc5984848977112f3c4ad4cf (diff) | |
i965: Switch mapping modes for non-explicit-flush blit-temporary maps.
On LLC, it should always be better to use a cached mapping than the GTT.
On non-LLC, it seems pretty silly to try to optimize read performance for
the INVALIDATE_RANGE_BIT case. This will make the buffer_storage logic
easier.
Reviewed-by: Kenneth Graunke <[email protected]>
Diffstat (limited to 'docs/specs/MESA_drm_image.spec')
0 files changed, 0 insertions, 0 deletions