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| author | Jason Ekstrand <[email protected]> | 2018-09-22 06:59:22 -0500 |
|---|---|---|
| committer | Jason Ekstrand <[email protected]> | 2018-10-02 10:24:56 -0500 |
| commit | 00f385e6d457d9b57f683ea52157e1620b96fa8c (patch) | |
| tree | 268503dc8d6258a14ba4f54d59770ba4c9f99b17 /docs/sourcedocs.html | |
| parent | bfc89c668e288747f51e447729914c91d27207e8 (diff) | |
nir/from_ssa: Don't rewrite derefs destinations to registers
We already call nir_rematerialize_derefs_in_use_blocks_impl prior to
calling nir_lower_ssa_defs_to_regs_block so the assertion that all deref
uses in the block should hold. This fixes the following CTS test when
SPIR-V optimization recipe 1:
dEQP-VK.glsl.struct.local.loop_nested_struct_array_vertex
Fixes: 606eb56ab9449b "intel/nir: Only lower load/store derefs"
Reviewed-by: Iago Toral Quiroga <[email protected]>
Diffstat (limited to 'docs/sourcedocs.html')
0 files changed, 0 insertions, 0 deletions