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authorKenneth Graunke <[email protected]>2014-09-30 01:15:55 -0700
committerKenneth Graunke <[email protected]>2014-10-09 15:02:55 +0200
commitd489a8a73d273e9042b3de49085576c2acd5153a (patch)
treef1401039388f14c02ff1368563a4f89d875162fe /docs/relnotes/7.9.html
parent8892a6b79c7c0ecb83b1e9b62f153b66030240db (diff)
i965: Add a BRW_MOCS_PTE #define.
Like BDW_MOCS_WB and BDW_MOCS_WT, this specifies that we want to use all three caches (L3, LLC, and eLLC where available), but leaves the LLC caching mode up to the kernel's page table entry. This allows the kernel to pick WB/WT/UC based on whether it's using a buffer for scanout. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Daniel Vetter <[email protected]> Reviewed-by: Kristian Høgsberg <[email protected]> Cc: [email protected]
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