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authorEric Anholt <eric@anholt.net>2015-07-31 11:46:56 -0700
committerEric Anholt <eric@anholt.net>2015-08-04 17:19:01 -0700
commitcc8fb2904673588d31b660dbfaf692615b5202dd (patch)
tree9eb8039f76db45555999e01939ce7a932c5398a6 /docs/relnotes/7.8.html
parent9b403c0756ecf806a8ff768bd73a4cbf42986bdb (diff)
vc4: Make r4-writes implicitly move to a temp, and allocate temps to r4.
Previously, SFU values always moved to a temporary, and TLB color reads and texture reads always lived in r4. Instead, we can have these results just be normal temporaries, and the register allocator can leave the values in r4 when they don't interfere with anything else using r4. shader-db results: total instructions in shared programs: 100809 -> 100040 (-0.76%) instructions in affected programs: 42383 -> 41614 (-1.81%)
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