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| author | Matt Turner <[email protected]> | 2020-01-02 14:44:16 -0800 |
|---|---|---|
| committer | Marge Bot <[email protected]> | 2020-01-22 00:19:21 +0000 |
| commit | 5f4eacaeda58e358072f0000403410b825803c13 (patch) | |
| tree | 2eb2730aaf06c6feec770e23717fc2778e678618 /docs/relnotes/10.6.4.html | |
| parent | 0fc490cdee93d031cbb4e27efb0710190af78e68 (diff) | |
intel/compiler: Validate some instruction word encodings
Specifically, execution size, register file, and register type. I did
not add validation for vertical stride and width because I don't believe
it's possible to have an otherwise valid instruction with an invalid
vertical stride or width, due to all of the other regioning
restrictions.
Reviewed-by: Caio Marcelo de Oliveira Filho <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/2635>
Diffstat (limited to 'docs/relnotes/10.6.4.html')
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