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| author | Emil Velikov <[email protected]> | 2017-03-09 02:05:07 +0000 |
|---|---|---|
| committer | Emil Velikov <[email protected]> | 2017-03-13 11:16:34 +0000 |
| commit | fb0832b86db07421d525ddd9633d247b70b897f9 (patch) | |
| tree | 60709d09fa94df17eeb271e20f34a7e4d724a435 /common.py | |
| parent | 2eefb903d58eefde766c6c8fd53fb519874d18b9 (diff) | |
i965: add missing brw_defines.h include in brw_program.c
File is using MI_LOAD_REGISTER_IMM, GEN7_CACHE_MODE_1 and others as
defined in the header.
Signed-off-by: Emil Velikov <[email protected]>
Reviewed-by: Jason Ekstrand <[email protected]>
Diffstat (limited to 'common.py')
0 files changed, 0 insertions, 0 deletions