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authorKenneth Graunke <[email protected]>2015-11-07 18:58:34 -0800
committerKenneth Graunke <[email protected]>2015-11-14 16:41:37 -0800
commitd2f089ba17c6b17823fc3d244e15c0a18108d5ce (patch)
tree9832b89b85298b9223b22e1647467ea62d1a154e /SConstruct
parent848fa3101d5077b1aecfb0886c69a7d0dd7f75bc (diff)
i965: Introduce a MOV_INDIRECT opcode.
The geometry and tessellation control shader stages both read from multiple URB entries (one per vertex). The thread payload contains several URB handles which reference these separate memory segments. In GLSL, these inputs are represented as per-vertex arrays; the outermost array index selects which vertex's inputs to read. This array index does not necessarily need to be constant. To handle that, we need to use indirect addressing on GRFs to select which of the thread payload registers has the appropriate URB handle. (This is before we can even think about applying the pull model!) This patch introduces a new opcode which performs a MOV from a source using VxH indirect addressing (which allows each of the 8 SIMD channels to select distinct data.) Based on a patch by Jason Ekstrand. v2: Rename from INDIRECT_THREAD_PAYLOAD_MOV to MOV_INDIRECT; make it a bit more generic. Use regs_read() instead of hacking up the register allocator. (Suggested by Jason Ekstrand.) v3: Fix regs_read() to be more accurate for small unaligned regions. Also rebase on Matt's work. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]> [v3] Reviewed-by: Abdiel Janulgue <[email protected]> [v1]
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