diff options
| author | Bas Nieuwenhuizen <[email protected]> | 2019-10-18 01:21:29 +0200 |
|---|---|---|
| committer | Dylan Baker <[email protected]> | 2019-10-22 08:51:15 -0700 |
| commit | ad56aaef4f47f6322286060c066ba29a39867be3 (patch) | |
| tree | e0a5fd24625a3fd0efde01932113297f5d56f26b /CleanSpec.mk | |
| parent | 35b900310b244639108b06d25c1b39aed057d24c (diff) | |
radv: Fix single stage constant flush with merged shaders.
e.g. a VERTEX only flush with tess on Vega should look at the TCS
to see which bits are needed.
CC: <[email protected]>
Closes: https://gitlab.freedesktop.org/mesa/mesa/issues/1953
Reviewed-by: Samuel Pitoiset <[email protected]>
(cherry picked from commit fd21ee8b52fb9416b16c63fd34c699b1301ce30c)
Conflicts resolved by Dylan Baker
Conflicts:
src/amd/vulkan/radv_cmd_buffer.c
Diffstat (limited to 'CleanSpec.mk')
0 files changed, 0 insertions, 0 deletions