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| author | Marek Olšák <[email protected]> | 2014-12-29 14:53:11 +0100 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2015-01-07 12:06:43 +0100 |
| commit | 18a30c97780bef9c498db915ba5e7debe832f576 (patch) | |
| tree | b45a733ffe4c56927819e5a7e365e6a9463e54b0 /CleanSpec.mk | |
| parent | 11b76369f53e064bef1bad629f957373c0e93b6c (diff) | |
radeonsi: use TC L2 for CP DMA operations with shader resources on CIK
So that TC L2 doesn't need to be flushed.
The only problem is with index buffers, which don't use TC.
A simple solution is added that flushes TC L2 before a draw call (TC_L2_dirty).
Reviewed-by: Michel Dänzer <[email protected]>
Diffstat (limited to 'CleanSpec.mk')
0 files changed, 0 insertions, 0 deletions