diff options
| author | Samuel Pitoiset <[email protected]> | 2019-05-06 16:17:26 +0200 |
|---|---|---|
| committer | Samuel Pitoiset <[email protected]> | 2019-05-06 19:07:44 +0200 |
| commit | c10808441cc479b715caf21d993866dc396397d9 (patch) | |
| tree | bc179518be6e14632a49e3d67d17d0e88f7c0239 | |
| parent | a032a9665f275085c825b54b62128ae90adba1c6 (diff) | |
radv: fix rowPitch for R32G32B32 formats on GFX9
The pitch is actually the number of components per row. We found
the problem when we implemented some meta operations for these
formats and the wrong pitch has been confirmed with a small test case.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=108325
Signed-off-by: Samuel Pitoiset <[email protected]>
Reviewed-by: Bas Nieuwenhuizen <[email protected]>
| -rw-r--r-- | src/amd/vulkan/radv_image.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/src/amd/vulkan/radv_image.c b/src/amd/vulkan/radv_image.c index 7c9a72c93c1..3ffb4e95749 100644 --- a/src/amd/vulkan/radv_image.c +++ b/src/amd/vulkan/radv_image.c @@ -1456,7 +1456,19 @@ void radv_GetImageSubresourceLayout( if (device->physical_device->rad_info.chip_class >= GFX9) { pLayout->offset = plane->offset + surface->u.gfx9.offset[level] + surface->u.gfx9.surf_slice_size * layer; - pLayout->rowPitch = surface->u.gfx9.surf_pitch * surface->bpe; + if (image->vk_format == VK_FORMAT_R32G32B32_UINT || + image->vk_format == VK_FORMAT_R32G32B32_SINT || + image->vk_format == VK_FORMAT_R32G32B32_SFLOAT) { + /* Adjust the number of bytes between each row because + * the pitch is actually the number of components per + * row. + */ + pLayout->rowPitch = surface->u.gfx9.surf_pitch * surface->bpe / 3; + } else { + assert(util_is_power_of_two_nonzero(surface->bpe)); + pLayout->rowPitch = surface->u.gfx9.surf_pitch * surface->bpe; + } + pLayout->arrayPitch = surface->u.gfx9.surf_slice_size; pLayout->depthPitch = surface->u.gfx9.surf_slice_size; pLayout->size = surface->u.gfx9.surf_slice_size; |