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authorSamuel Pitoiset <[email protected]>2020-01-17 08:22:48 +0100
committerSamuel Pitoiset <[email protected]>2020-01-17 16:56:04 +0100
commitb9b393f0ce4e8df85f2e7eafeb409b032819e33d (patch)
tree45c6e0e00b3fa90c231b861072e509b46746793f
parent6af63c939bf0b7db2ad918cab953cab637806f94 (diff)
aco: fix emitting slc for MUBUF instructions on GFX6-GFX7
Same as GFX10, only GFX8/GFX9 moved that bit near the opcode. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Daniel Schürmann <[email protected]> Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3437> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3437>
-rw-r--r--src/amd/compiler/aco_assembler.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/amd/compiler/aco_assembler.cpp b/src/amd/compiler/aco_assembler.cpp
index a9dd6b441e2..dc341e59de0 100644
--- a/src/amd/compiler/aco_assembler.cpp
+++ b/src/amd/compiler/aco_assembler.cpp
@@ -321,7 +321,7 @@ void emit_instruction(asm_context& ctx, std::vector<uint32_t>& out, Instruction*
encoding |= 0x0FFF & mubuf->offset;
out.push_back(encoding);
encoding = 0;
- if (ctx.chip_class >= GFX10) {
+ if (ctx.chip_class <= GFX7 || ctx.chip_class >= GFX10) {
encoding |= (mubuf->slc ? 1 : 0) << 22;
}
encoding |= instr->operands[2].physReg() << 24;