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authorKeith Whitwell <[email protected]>2007-12-20 13:47:11 +0000
committerKeith Whitwell <[email protected]>2007-12-20 13:47:11 +0000
commit9e41d547db6669ff669f1d60cb35df9edf306370 (patch)
tree40392212075ca054c2f6bdbdfbe242e8eca274ce
parent21c67b70d4bcffad8f0f07c0423c18e59f4259ea (diff)
965: respect pipe flush flags
Now we emit way too many flushes instead of none at all.
-rw-r--r--src/mesa/pipe/i965simple/brw_batch.h2
-rw-r--r--src/mesa/pipe/i965simple/brw_curbe.c1
-rw-r--r--src/mesa/pipe/i965simple/brw_flush.c20
-rw-r--r--src/mesa/pipe/i965simple/brw_state.h1
-rw-r--r--src/mesa/pipe/i965simple/brw_urb.c3
5 files changed, 13 insertions, 14 deletions
diff --git a/src/mesa/pipe/i965simple/brw_batch.h b/src/mesa/pipe/i965simple/brw_batch.h
index bef69ac871b..8605d7c1083 100644
--- a/src/mesa/pipe/i965simple/brw_batch.h
+++ b/src/mesa/pipe/i965simple/brw_batch.h
@@ -53,4 +53,6 @@
brw->hardware_dirty = ~0; \
} while (0)
+#define BRW_BATCH_STRUCT(brw, s) brw_batchbuffer_data( brw->winsys, (s), sizeof(*(s)))
+
#endif
diff --git a/src/mesa/pipe/i965simple/brw_curbe.c b/src/mesa/pipe/i965simple/brw_curbe.c
index ee20e003624..785affa2d86 100644
--- a/src/mesa/pipe/i965simple/brw_curbe.c
+++ b/src/mesa/pipe/i965simple/brw_curbe.c
@@ -34,6 +34,7 @@
#include "brw_context.h"
#include "brw_defines.h"
#include "brw_state.h"
+#include "brw_batch.h"
#include "brw_util.h"
#include "brw_wm.h"
#include "pipe/p_state.h"
diff --git a/src/mesa/pipe/i965simple/brw_flush.c b/src/mesa/pipe/i965simple/brw_flush.c
index 1f11c5f164c..5216c680cf6 100644
--- a/src/mesa/pipe/i965simple/brw_flush.c
+++ b/src/mesa/pipe/i965simple/brw_flush.c
@@ -49,22 +49,18 @@ static void brw_flush( struct pipe_context *pipe,
* caches?
*/
if (flags & (PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE)) {
- unsigned flush = CMD_MI_FLUSH;
-
-#if 0
+ struct brw_mi_flush flush;
+
+ memset(&flush, 0, sizeof(flush));
+ flush.opcode = CMD_MI_FLUSH;
+
if (!(flags & PIPE_FLUSH_RENDER_CACHE))
- flush |= INHIBIT_FLUSH_RENDER_CACHE;
+ flush.flags |= BRW_INHIBIT_FLUSH_RENDER_CACHE;
if (flags & PIPE_FLUSH_TEXTURE_CACHE)
- flush |= FLUSH_MAP_CACHE;
-#endif
+ flush.flags |= BRW_FLUSH_READ_CACHE;
- if (!BEGIN_BATCH(1, 0)) {
- FLUSH_BATCH( &fence );
- assert(BEGIN_BATCH(1, 0));
- }
- OUT_BATCH( flush );
- ADVANCE_BATCH();
+ BRW_BATCH_STRUCT(brw, &flush);
}
/* If there are no flags, just flush pending commands to hardware:
diff --git a/src/mesa/pipe/i965simple/brw_state.h b/src/mesa/pipe/i965simple/brw_state.h
index 62055e55061..8b4d7aabf0a 100644
--- a/src/mesa/pipe/i965simple/brw_state.h
+++ b/src/mesa/pipe/i965simple/brw_state.h
@@ -115,7 +115,6 @@ static inline struct pipe_buffer_handle *brw_cache_buffer(struct brw_context *br
/***********************************************************************
* brw_state_batch.c
*/
-#define BRW_BATCH_STRUCT(brw, s) brw_batchbuffer_data( brw->winsys, (s), sizeof(*(s)))
#define BRW_CACHED_BATCH_STRUCT(brw, s) brw_cached_batch_struct( brw, (s), sizeof(*(s)) )
boolean brw_cached_batch_struct( struct brw_context *brw,
diff --git a/src/mesa/pipe/i965simple/brw_urb.c b/src/mesa/pipe/i965simple/brw_urb.c
index 8cc86e26a34..b284526aa6e 100644
--- a/src/mesa/pipe/i965simple/brw_urb.c
+++ b/src/mesa/pipe/i965simple/brw_urb.c
@@ -31,7 +31,8 @@
#include "brw_context.h"
-#include "brw_state.h"
+//#include "brw_state.h"
+#include "brw_batch.h"
#include "brw_defines.h"
#define VS 0