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authorEric Anholt <[email protected]>2019-04-08 16:32:01 -0700
committerEric Anholt <[email protected]>2019-04-10 11:44:20 -0700
commit771adffec1b6e504367b83c121efd0fb657bb262 (patch)
tree0e95d2b60b3492afcaf32aa332667749a194db27
parent3053d5a4f2fd6f81a6fb8d398afeaca91c7692e8 (diff)
st: Lower uniforms in st in the !PIPE_CAP_PACKED_UNIFORMS case as well.
PIPE_CAP_PACKED_UNIFORMS conflates several things: Lowering uniforms i/o at the st level instead of the backend, packing uniforms with no padding at all, and lowering to UBOs. Requiring backends to lower uniforms i/o for !PIPE_CAP_PACKED_UNIFORMS leads to the driver needing to either link against the type size function in mesa/st, or duplicating it in the backend. Given that all backends want this lower-io as far as I can tell, just move it to mesa/st to resolve the link issue and avoid the driver author needing to understand st's uniforms layout. Incidentally, fixes uniform layout failures in nouveau in: dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_fragment dEQP-GLES2.functional.shaders.struct.uniform.sampler_nested_vertex dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_fragment dEQP-GLES2.functional.shaders.struct.uniform.sampler_array_vertex and I think in Lima as well. v2: fix indents Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/gallium/drivers/panfrost/midgard/midgard_compile.c3
-rw-r--r--src/gallium/drivers/v3d/v3d_program.c11
-rw-r--r--src/gallium/drivers/vc4/vc4_program.c7
-rw-r--r--src/mesa/state_tracker/st_glsl_to_nir.cpp3
-rw-r--r--src/mesa/state_tracker/st_glsl_types.cpp11
-rw-r--r--src/mesa/state_tracker/st_glsl_types.h2
-rw-r--r--src/mesa/state_tracker/st_nir_builtins.c3
7 files changed, 21 insertions, 19 deletions
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
index f91fa972246..8104d442f82 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
+++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
@@ -3532,8 +3532,7 @@ midgard_compile_shader_nir(nir_shader *nir, midgard_program *program, bool is_bl
NIR_PASS_V(nir, nir_lower_var_copies);
NIR_PASS_V(nir, nir_lower_vars_to_ssa);
- NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, uniform_type_size, 0);
- NIR_PASS_V(nir, nir_lower_io, nir_var_all & ~nir_var_uniform, glsl_type_size, 0);
+ NIR_PASS_V(nir, nir_lower_io, nir_var_all, glsl_type_size, 0);
/* Append vertex epilogue before optimisation, so the epilogue itself
* is optimised */
diff --git a/src/gallium/drivers/v3d/v3d_program.c b/src/gallium/drivers/v3d/v3d_program.c
index b8da87c7797..e3515335502 100644
--- a/src/gallium/drivers/v3d/v3d_program.c
+++ b/src/gallium/drivers/v3d/v3d_program.c
@@ -36,7 +36,6 @@
#include "compiler/v3d_compiler.h"
#include "v3d_context.h"
#include "broadcom/cle/v3d_packet_v33_pack.h"
-#include "mesa/state_tracker/st_glsl_types.h"
static struct v3d_compiled_shader *
v3d_get_compiled_shader(struct v3d_context *v3d, struct v3d_key *key);
@@ -175,12 +174,6 @@ type_size(const struct glsl_type *type)
return glsl_count_attribute_slots(type, false);
}
-static int
-uniforms_type_size(const struct glsl_type *type)
-{
- return st_glsl_storage_type_size(type, false);
-}
-
/**
* Precompiles a shader variant at shader state creation time if
* V3D_DEBUG=precompile is set. Used for shader-db
@@ -262,10 +255,6 @@ v3d_shader_state_create(struct pipe_context *pctx,
* creation.
*/
s = cso->ir.nir;
-
- NIR_PASS_V(s, nir_lower_io, nir_var_uniform,
- uniforms_type_size,
- (nir_lower_io_options)0);
} else {
assert(cso->type == PIPE_SHADER_IR_TGSI);
diff --git a/src/gallium/drivers/vc4/vc4_program.c b/src/gallium/drivers/vc4/vc4_program.c
index 91a99d0574b..135d4bc7198 100644
--- a/src/gallium/drivers/vc4/vc4_program.c
+++ b/src/gallium/drivers/vc4/vc4_program.c
@@ -2487,10 +2487,6 @@ vc4_shader_state_create(struct pipe_context *pctx,
* creation.
*/
s = cso->ir.nir;
-
- NIR_PASS_V(s, nir_lower_io, nir_var_uniform,
- uniforms_type_size,
- (nir_lower_io_options)0);
} else {
assert(cso->type == PIPE_SHADER_IR_TGSI);
@@ -2503,8 +2499,7 @@ vc4_shader_state_create(struct pipe_context *pctx,
s = tgsi_to_nir(cso->tokens, pctx->screen);
}
- NIR_PASS_V(s, nir_lower_io, nir_var_all & ~nir_var_uniform,
- type_size,
+ NIR_PASS_V(s, nir_lower_io, nir_var_all, type_size,
(nir_lower_io_options)0);
NIR_PASS_V(s, nir_lower_regs_to_ssa);
diff --git a/src/mesa/state_tracker/st_glsl_to_nir.cpp b/src/mesa/state_tracker/st_glsl_to_nir.cpp
index fb10869c9f9..bb693dc70f7 100644
--- a/src/mesa/state_tracker/st_glsl_to_nir.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_nir.cpp
@@ -945,6 +945,9 @@ st_finalize_nir(struct st_context *st, struct gl_program *prog,
NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
(nir_lower_io_options)0);
NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4);
+ } else {
+ NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_uniforms_type_size,
+ (nir_lower_io_options)0);
}
st_nir_lower_samplers(screen, nir, shader_program, prog);
diff --git a/src/mesa/state_tracker/st_glsl_types.cpp b/src/mesa/state_tracker/st_glsl_types.cpp
index 42d4e9cef2d..277b91c4a5c 100644
--- a/src/mesa/state_tracker/st_glsl_types.cpp
+++ b/src/mesa/state_tracker/st_glsl_types.cpp
@@ -155,3 +155,14 @@ st_glsl_type_dword_size(const struct glsl_type *type)
return 0;
}
+
+/**
+ * Returns the type size of uniforms when !PIPE_CAP_PACKED_UNIFORMS -- each
+ * value or array element is aligned to a vec4 offset and expanded out to a
+ * vec4.
+ */
+int
+st_glsl_uniforms_type_size(const struct glsl_type *type)
+{
+ return st_glsl_storage_type_size(type, false);
+}
diff --git a/src/mesa/state_tracker/st_glsl_types.h b/src/mesa/state_tracker/st_glsl_types.h
index 16b31b684f3..e0aff12366a 100644
--- a/src/mesa/state_tracker/st_glsl_types.h
+++ b/src/mesa/state_tracker/st_glsl_types.h
@@ -36,6 +36,8 @@ extern "C" {
int st_glsl_storage_type_size(const struct glsl_type *type,
bool is_bindless);
+int st_glsl_uniforms_type_size(const struct glsl_type *type);
+
int st_glsl_type_dword_size(const struct glsl_type *type);
#ifdef __cplusplus
diff --git a/src/mesa/state_tracker/st_nir_builtins.c b/src/mesa/state_tracker/st_nir_builtins.c
index 8ec320cbb9c..01663b702ac 100644
--- a/src/mesa/state_tracker/st_nir_builtins.c
+++ b/src/mesa/state_tracker/st_nir_builtins.c
@@ -67,6 +67,9 @@ st_nir_finish_builtin_shader(struct st_context *st,
NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_type_dword_size,
(nir_lower_io_options)0);
NIR_PASS_V(nir, nir_lower_uniforms_to_ubo, 4);
+ } else {
+ NIR_PASS_V(nir, nir_lower_io, nir_var_uniform, st_glsl_uniforms_type_size,
+ (nir_lower_io_options)0);
}
struct pipe_shader_state state = {