diff options
author | Paul Berry <[email protected]> | 2012-08-30 10:57:03 -0700 |
---|---|---|
committer | Paul Berry <[email protected]> | 2012-09-12 14:44:13 -0700 |
commit | 50dec7fc2d5ba813aaa822596d124098a22db301 (patch) | |
tree | 30490f60831d33a16ee861dfcecfc2eea0be133d | |
parent | f04f219906e40a6647a10fd9c1928509fe25fb84 (diff) |
intel: Add map_stencil_as_y_tiled to intel_region_get_tile_masks.
When the blorp engine is performing a blit from one stencil buffer to
another, it sets up the surface state for these buffers as Y-tiled, so
it needs to be able to force intel_region_get_tile_masks() to return
the appropriate masks for a Y-tiled region.
NOTE: This is a candidate for stable release branches.
Acked-by: Eric Anholt <[email protected]>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_blorp.cpp | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_misc_state.c | 6 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen6_blorp.cpp | 4 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i965/gen7_misc_state.c | 5 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_fbo.c | 2 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_regions.c | 9 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_regions.h | 3 | ||||
-rw-r--r-- | src/mesa/drivers/dri/intel/intel_screen.c | 2 |
8 files changed, 21 insertions, 13 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp index 3368907e1b8..7e4519147e5 100644 --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp @@ -122,7 +122,8 @@ brw_blorp_surface_info::compute_tile_offsets(uint32_t *tile_x, struct intel_region *region = mt->region; uint32_t mask_x, mask_y; - intel_region_get_tile_masks(region, &mask_x, &mask_y); + intel_region_get_tile_masks(region, &mask_x, &mask_y, + map_stencil_as_y_tiled); *tile_x = x_offset & mask_x; *tile_y = y_offset & mask_y; diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index 3f186f54ecf..52926fb4f23 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -288,7 +288,7 @@ static void emit_depthbuffer(struct brw_context *brw) if (depth_irb) { intel_region_get_tile_masks(depth_irb->mt->region, - &tile_mask_x, &tile_mask_y); + &tile_mask_x, &tile_mask_y, false); } if (depth_irb && @@ -298,7 +298,7 @@ static void emit_depthbuffer(struct brw_context *brw) uint32_t hiz_tile_mask_x, hiz_tile_mask_y; intel_region_get_tile_masks(hiz_region, - &hiz_tile_mask_x, &hiz_tile_mask_y); + &hiz_tile_mask_x, &hiz_tile_mask_y, false); /* Each HiZ row represents 2 rows of pixels */ hiz_tile_mask_y = hiz_tile_mask_y << 1 | 1; @@ -331,7 +331,7 @@ static void emit_depthbuffer(struct brw_context *brw) uint32_t stencil_tile_mask_x, stencil_tile_mask_y; intel_region_get_tile_masks(stencil_mt->region, &stencil_tile_mask_x, - &stencil_tile_mask_y); + &stencil_tile_mask_y, false); tile_mask_x |= stencil_tile_mask_x; tile_mask_y |= stencil_tile_mask_y; diff --git a/src/mesa/drivers/dri/i965/gen6_blorp.cpp b/src/mesa/drivers/dri/i965/gen6_blorp.cpp index baf3fa4531c..3e0b80e36cf 100644 --- a/src/mesa/drivers/dri/i965/gen6_blorp.cpp +++ b/src/mesa/drivers/dri/i965/gen6_blorp.cpp @@ -58,9 +58,9 @@ gen6_blorp_compute_tile_masks(const brw_blorp_params *params, { uint32_t depth_mask_x, depth_mask_y, hiz_mask_x, hiz_mask_y; intel_region_get_tile_masks(params->depth.mt->region, - &depth_mask_x, &depth_mask_y); + &depth_mask_x, &depth_mask_y, false); intel_region_get_tile_masks(params->depth.mt->hiz_mt->region, - &hiz_mask_x, &hiz_mask_y); + &hiz_mask_x, &hiz_mask_y, false); /* Each HiZ row represents 2 rows of pixels */ hiz_mask_y = hiz_mask_y << 1 | 1; diff --git a/src/mesa/drivers/dri/i965/gen7_misc_state.c b/src/mesa/drivers/dri/i965/gen7_misc_state.c index a0d24607bc5..9709b8ef8b4 100644 --- a/src/mesa/drivers/dri/i965/gen7_misc_state.c +++ b/src/mesa/drivers/dri/i965/gen7_misc_state.c @@ -69,12 +69,13 @@ static void emit_depthbuffer(struct brw_context *brw) hiz_mt = depth_mt->hiz_mt; intel_region_get_tile_masks(depth_mt->region, - &tile_mask_x, &tile_mask_y); + &tile_mask_x, &tile_mask_y, false); if (hiz_mt) { uint32_t hiz_tile_mask_x, hiz_tile_mask_y; intel_region_get_tile_masks(hiz_mt->region, - &hiz_tile_mask_x, &hiz_tile_mask_y); + &hiz_tile_mask_x, &hiz_tile_mask_y, + false); /* Each HiZ row represents 2 rows of pixels */ hiz_tile_mask_y = hiz_tile_mask_y << 1 | 1; diff --git a/src/mesa/drivers/dri/intel/intel_fbo.c b/src/mesa/drivers/dri/intel/intel_fbo.c index c522b486bcf..bd9548b9501 100644 --- a/src/mesa/drivers/dri/intel/intel_fbo.c +++ b/src/mesa/drivers/dri/intel/intel_fbo.c @@ -581,7 +581,7 @@ intel_renderbuffer_tile_offsets(struct intel_renderbuffer *irb, struct intel_region *region = irb->mt->region; uint32_t mask_x, mask_y; - intel_region_get_tile_masks(region, &mask_x, &mask_y); + intel_region_get_tile_masks(region, &mask_x, &mask_y, false); *tile_x = irb->draw_x & mask_x; *tile_y = irb->draw_y & mask_y; diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index 9bf9c668da5..18402d64d02 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -404,11 +404,16 @@ intel_region_copy(struct intel_context *intel, */ void intel_region_get_tile_masks(struct intel_region *region, - uint32_t *mask_x, uint32_t *mask_y) + uint32_t *mask_x, uint32_t *mask_y, + bool map_stencil_as_y_tiled) { int cpp = region->cpp; + uint32_t tiling = region->tiling; - switch (region->tiling) { + if (map_stencil_as_y_tiled) + tiling = I915_TILING_Y; + + switch (tiling) { default: assert(false); case I915_TILING_NONE: diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h index 7480853d360..e259a1e79a2 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.h +++ b/src/mesa/drivers/dri/intel/intel_regions.h @@ -135,7 +135,8 @@ void _mesa_copy_rect(GLubyte * dst, void intel_region_get_tile_masks(struct intel_region *region, - uint32_t *mask_x, uint32_t *mask_y); + uint32_t *mask_x, uint32_t *mask_y, + bool map_stencil_as_y_tiled); uint32_t intel_region_get_aligned_offset(struct intel_region *region, uint32_t x, diff --git a/src/mesa/drivers/dri/intel/intel_screen.c b/src/mesa/drivers/dri/intel/intel_screen.c index ca6ac3446b4..e3a442c2a27 100644 --- a/src/mesa/drivers/dri/intel/intel_screen.c +++ b/src/mesa/drivers/dri/intel/intel_screen.c @@ -564,7 +564,7 @@ intel_from_planar(__DRIimage *parent, int plane, void *loaderPrivate) image->region->screen = parent->region->screen; image->offset = offset; - intel_region_get_tile_masks(image->region, &mask_x, &mask_y); + intel_region_get_tile_masks(image->region, &mask_x, &mask_y, false); if (offset & mask_x) _mesa_warning(NULL, "intel_create_sub_image: offset not on tile boundary"); |