diff options
author | Rob Clark <[email protected]> | 2020-04-16 14:13:39 -0700 |
---|---|---|
committer | Marge Bot <[email protected]> | 2020-04-30 20:03:17 +0000 |
commit | 46e177389fee7f5eed90e5debd122bfebb772ad4 (patch) | |
tree | 0694fd87e006c98e13272ab0d7093a3ae31da3dc | |
parent | 8cfa765049d571a95b14ea006f900de8a7bf5cae (diff) |
freedreno/a6xx: move scissor state to stateobj
To reduce CP overhead for draws skipped in a given tile.
Signed-off-by: Rob Clark <[email protected]>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4813>
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_emit.c | 10 | ||||
-rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_emit.h | 1 |
2 files changed, 9 insertions, 2 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c index c7be485a8f2..4fab91c2a51 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c @@ -985,8 +985,12 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit) A6XX_RB_STENCILREF_BFREF(sr->ref_value[1])); } - /* NOTE: scissor enabled bit is part of rasterizer state: */ - if (dirty & (FD_DIRTY_SCISSOR | FD_DIRTY_RASTERIZER)) { + /* NOTE: scissor enabled bit is part of rasterizer state, but + * fd_rasterizer_state_bind() will mark scissor dirty if needed: + */ + if (dirty & FD_DIRTY_SCISSOR) { + struct fd_ringbuffer *ring = fd_submit_new_ringbuffer( + emit->ctx->batch->submit, 3*4, FD_RINGBUFFER_STREAMING); struct pipe_scissor_state *scissor = fd_context_get_scissor(ctx); OUT_PKT4(ring, REG_A6XX_GRAS_SC_SCREEN_SCISSOR_TL_0, 2); @@ -995,6 +999,8 @@ fd6_emit_state(struct fd_ringbuffer *ring, struct fd6_emit *emit) OUT_RING(ring, A6XX_GRAS_SC_SCREEN_SCISSOR_TL_0_X(scissor->maxx - 1) | A6XX_GRAS_SC_SCREEN_SCISSOR_TL_0_Y(scissor->maxy - 1)); + fd6_emit_take_group(emit, ring, FD6_GROUP_SCISSOR, ENABLE_ALL); + ctx->batch->max_scissor.minx = MIN2(ctx->batch->max_scissor.minx, scissor->minx); ctx->batch->max_scissor.miny = MIN2(ctx->batch->max_scissor.miny, scissor->miny); ctx->batch->max_scissor.maxx = MAX2(ctx->batch->max_scissor.maxx, scissor->maxx); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h index c5e8882f6a9..d0642cb564e 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.h +++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.h @@ -63,6 +63,7 @@ enum fd6_state_id { FD6_GROUP_RASTERIZER, FD6_GROUP_ZSA, FD6_GROUP_BLEND, + FD6_GROUP_SCISSOR, }; #define ENABLE_ALL (CP_SET_DRAW_STATE__0_BINNING | CP_SET_DRAW_STATE__0_GMEM | CP_SET_DRAW_STATE__0_SYSMEM) |