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authorRafael Antognolli <[email protected]>2017-04-05 16:22:43 -0700
committerKenneth Graunke <[email protected]>2017-05-03 20:38:20 -0700
commit46d8f9454f8bdd469f389b78ce3cb8ef35b7fd68 (patch)
treef7b0f3a5c9b99f618083bae567d78faba5e3b86b
parentd729936c5e6466d5ec336a446f06d9f65bd5cc43 (diff)
i965: Port push constant code to genxml.
The following states are ported on this patch: - gen6_gs_push_constants - gen6_vs_push_constants - gen6_wm_push_constants - gen7_tes_push_constants v2: - Use helper to setup brw_address (Kristian) v3: - Do not use macro for upload_constant_state (Ken) - Do not re-declare MOCS macro (Ken) v4: (by Ken) - Drop more dead code, change brw->gen checks to GEN_GEN, style nits Signed-off-by: Rafael Antognolli <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/Makefile.sources4
-rw-r--r--src/mesa/drivers/dri/i965/brw_state.h5
-rw-r--r--src/mesa/drivers/dri/i965/gen6_constant_state.c73
-rw-r--r--src/mesa/drivers/dri/i965/gen6_gs_state.c33
-rw-r--r--src/mesa/drivers/dri/i965/gen6_vs_state.c70
-rw-r--r--src/mesa/drivers/dri/i965/gen6_wm_state.c70
-rw-r--r--src/mesa/drivers/dri/i965/gen7_ds_state.c57
-rw-r--r--src/mesa/drivers/dri/i965/gen7_hs_state.c60
-rw-r--r--src/mesa/drivers/dri/i965/genX_state_upload.c239
9 files changed, 226 insertions, 385 deletions
diff --git a/src/mesa/drivers/dri/i965/Makefile.sources b/src/mesa/drivers/dri/i965/Makefile.sources
index a63d5762ef6..34162bd1d87 100644
--- a/src/mesa/drivers/dri/i965/Makefile.sources
+++ b/src/mesa/drivers/dri/i965/Makefile.sources
@@ -87,11 +87,7 @@ i965_FILES = \
gen6_sol.c \
gen6_urb.c \
gen6_viewport_state.c \
- gen6_vs_state.c \
- gen6_wm_state.c \
gen7_cs_state.c \
- gen7_ds_state.c \
- gen7_hs_state.c \
gen7_l3_state.c \
gen7_misc_state.c \
gen7_sol_state.c \
diff --git a/src/mesa/drivers/dri/i965/brw_state.h b/src/mesa/drivers/dri/i965/brw_state.h
index 6adcf46344f..084f97fa1c4 100644
--- a/src/mesa/drivers/dri/i965/brw_state.h
+++ b/src/mesa/drivers/dri/i965/brw_state.h
@@ -109,7 +109,6 @@ extern const struct brw_tracked_state brw_cs_state;
extern const struct brw_tracked_state gen7_cs_push_constants;
extern const struct brw_tracked_state gen6_binding_table_pointers;
extern const struct brw_tracked_state gen6_color_calc_state;
-extern const struct brw_tracked_state gen6_gs_push_constants;
extern const struct brw_tracked_state gen6_gs_binding_table;
extern const struct brw_tracked_state gen6_multisample_state;
extern const struct brw_tracked_state gen6_renderbuffer_surfaces;
@@ -118,13 +117,9 @@ extern const struct brw_tracked_state gen6_sol_surface;
extern const struct brw_tracked_state gen6_sf_vp;
extern const struct brw_tracked_state gen6_urb;
extern const struct brw_tracked_state gen6_viewport_state;
-extern const struct brw_tracked_state gen6_vs_push_constants;
-extern const struct brw_tracked_state gen6_wm_push_constants;
extern const struct brw_tracked_state gen7_depthbuffer;
-extern const struct brw_tracked_state gen7_tcs_push_constants;
extern const struct brw_tracked_state gen7_l3_state;
extern const struct brw_tracked_state gen7_push_constant_space;
-extern const struct brw_tracked_state gen7_tes_push_constants;
extern const struct brw_tracked_state gen7_urb;
extern const struct brw_tracked_state haswell_cut_index;
extern const struct brw_tracked_state gen8_index_buffer;
diff --git a/src/mesa/drivers/dri/i965/gen6_constant_state.c b/src/mesa/drivers/dri/i965/gen6_constant_state.c
index 40941c17711..460f1c51457 100644
--- a/src/mesa/drivers/dri/i965/gen6_constant_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_constant_state.c
@@ -27,79 +27,6 @@
#include "intel_batchbuffer.h"
#include "program/prog_parameter.h"
-void
-gen7_upload_constant_state(struct brw_context *brw,
- const struct brw_stage_state *stage_state,
- bool active, unsigned opcode)
-{
- uint32_t mocs = brw->gen < 8 ? GEN7_MOCS_L3 : 0;
-
- /* Disable if the shader stage is inactive or there are no push constants. */
- active = active && stage_state->push_const_size != 0;
-
- int dwords = brw->gen >= 8 ? 11 : 7;
- BEGIN_BATCH(dwords);
- OUT_BATCH(opcode << 16 | (dwords - 2));
-
- /* Workaround for SKL+ (we use option #2 until we have a need for more
- * constant buffers). This comes from the documentation for 3DSTATE_CONSTANT_*
- *
- * The driver must ensure The following case does not occur without a flush
- * to the 3D engine: 3DSTATE_CONSTANT_* with buffer 3 read length equal to
- * zero committed followed by a 3DSTATE_CONSTANT_* with buffer 0 read length
- * not equal to zero committed. Possible ways to avoid this condition
- * include:
- * 1. always force buffer 3 to have a non zero read length
- * 2. always force buffer 0 to a zero read length
- */
- if (brw->gen >= 9 && active) {
- OUT_BATCH(0);
- OUT_BATCH(stage_state->push_const_size);
- } else {
- OUT_BATCH(active ? stage_state->push_const_size : 0);
- OUT_BATCH(0);
- }
- /* Pointer to the constant buffer. Covered by the set of state flags
- * from gen6_prepare_wm_contants
- */
- if (brw->gen >= 9 && active) {
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- /* XXX: When using buffers other than 0, you need to specify the
- * graphics virtual address regardless of INSPM/debug bits
- */
- OUT_RELOC64(brw->batch.bo, I915_GEM_DOMAIN_RENDER, 0,
- stage_state->push_const_offset);
- OUT_BATCH(0);
- OUT_BATCH(0);
- } else if (brw->gen >= 8) {
- OUT_BATCH(active ? (stage_state->push_const_offset | mocs) : 0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- } else {
- OUT_BATCH(active ? (stage_state->push_const_offset | mocs) : 0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- OUT_BATCH(0);
- }
-
- ADVANCE_BATCH();
-
- /* On SKL+ the new constants don't take effect until the next corresponding
- * 3DSTATE_BINDING_TABLE_POINTER_* command is parsed so we need to ensure
- * that is sent
- */
- if (brw->gen >= 9)
- brw->ctx.NewDriverState |= BRW_NEW_SURFACES;
-}
-
/**
* Creates a streamed BO containing the push constants for the VS or GS on
* gen6+.
diff --git a/src/mesa/drivers/dri/i965/gen6_gs_state.c b/src/mesa/drivers/dri/i965/gen6_gs_state.c
index 6a9e951a42b..6450c769702 100644
--- a/src/mesa/drivers/dri/i965/gen6_gs_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_gs_state.c
@@ -31,39 +31,6 @@
#include "intel_batchbuffer.h"
#include "main/shaderapi.h"
-static void
-gen6_upload_gs_push_constants(struct brw_context *brw)
-{
- struct brw_stage_state *stage_state = &brw->gs.base;
-
- /* BRW_NEW_GEOMETRY_PROGRAM */
- const struct brw_program *gp = brw_program_const(brw->geometry_program);
-
- if (gp) {
- /* BRW_NEW_GS_PROG_DATA */
- struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data;
-
- _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_GEOMETRY);
- gen6_upload_push_constants(brw, &gp->program, prog_data, stage_state);
- }
-
- if (brw->gen >= 7)
- gen7_upload_constant_state(brw, stage_state, gp, _3DSTATE_CONSTANT_GS);
-}
-
-const struct brw_tracked_state gen6_gs_push_constants = {
- .dirty = {
- .mesa = _NEW_PROGRAM_CONSTANTS |
- _NEW_TRANSFORM,
- .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_GEOMETRY_PROGRAM |
- BRW_NEW_GS_PROG_DATA |
- BRW_NEW_PUSH_CONSTANT_ALLOCATION,
- },
- .emit = gen6_upload_gs_push_constants,
-};
-
void
upload_gs_state_for_tf(struct brw_context *brw)
{
diff --git a/src/mesa/drivers/dri/i965/gen6_vs_state.c b/src/mesa/drivers/dri/i965/gen6_vs_state.c
deleted file mode 100644
index b2d2306858d..00000000000
--- a/src/mesa/drivers/dri/i965/gen6_vs_state.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright © 2009 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <[email protected]>
- *
- */
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "brw_util.h"
-#include "program/prog_parameter.h"
-#include "program/prog_statevars.h"
-#include "main/shaderapi.h"
-#include "intel_batchbuffer.h"
-
-static void
-gen6_upload_vs_push_constants(struct brw_context *brw)
-{
- struct brw_stage_state *stage_state = &brw->vs.base;
-
- /* _BRW_NEW_VERTEX_PROGRAM */
- const struct brw_program *vp = brw_program_const(brw->vertex_program);
- /* BRW_NEW_VS_PROG_DATA */
- const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data;
-
- _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_VERTEX);
- gen6_upload_push_constants(brw, &vp->program, prog_data, stage_state);
-
- if (brw->gen >= 7) {
- if (brw->gen == 7 && !brw->is_haswell && !brw->is_baytrail)
- gen7_emit_vs_workaround_flush(brw);
-
- gen7_upload_constant_state(brw, stage_state, true /* active */,
- _3DSTATE_CONSTANT_VS);
- }
-}
-
-const struct brw_tracked_state gen6_vs_push_constants = {
- .dirty = {
- .mesa = _NEW_PROGRAM_CONSTANTS |
- _NEW_TRANSFORM,
- .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_PUSH_CONSTANT_ALLOCATION |
- BRW_NEW_VERTEX_PROGRAM |
- BRW_NEW_VS_PROG_DATA,
- },
- .emit = gen6_upload_vs_push_constants,
-};
diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
deleted file mode 100644
index 9da1bddb1cd..00000000000
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright © 2009 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
- * IN THE SOFTWARE.
- *
- * Authors:
- * Eric Anholt <[email protected]>
- *
- */
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "compiler/brw_eu_defines.h"
-#include "brw_util.h"
-#include "brw_wm.h"
-#include "program/program.h"
-#include "program/prog_parameter.h"
-#include "program/prog_statevars.h"
-#include "main/shaderapi.h"
-#include "main/framebuffer.h"
-#include "intel_batchbuffer.h"
-
-static void
-gen6_upload_wm_push_constants(struct brw_context *brw)
-{
- struct brw_stage_state *stage_state = &brw->wm.base;
- /* BRW_NEW_FRAGMENT_PROGRAM */
- const struct brw_program *fp = brw_program_const(brw->fragment_program);
- /* BRW_NEW_FS_PROG_DATA */
- const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data;
-
- _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_FRAGMENT);
-
- gen6_upload_push_constants(brw, &fp->program, prog_data, stage_state);
-
- if (brw->gen >= 7) {
- gen7_upload_constant_state(brw, &brw->wm.base, true,
- _3DSTATE_CONSTANT_PS);
- }
-}
-
-const struct brw_tracked_state gen6_wm_push_constants = {
- .dirty = {
- .mesa = _NEW_PROGRAM_CONSTANTS,
- .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_FRAGMENT_PROGRAM |
- BRW_NEW_FS_PROG_DATA |
- BRW_NEW_PUSH_CONSTANT_ALLOCATION,
- },
- .emit = gen6_upload_wm_push_constants,
-};
diff --git a/src/mesa/drivers/dri/i965/gen7_ds_state.c b/src/mesa/drivers/dri/i965/gen7_ds_state.c
deleted file mode 100644
index f6bb41d3f57..00000000000
--- a/src/mesa/drivers/dri/i965/gen7_ds_state.c
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "intel_batchbuffer.h"
-#include "main/shaderapi.h"
-
-static void
-gen7_upload_tes_push_constants(struct brw_context *brw)
-{
- struct brw_stage_state *stage_state = &brw->tes.base;
- /* BRW_NEW_TESS_PROGRAMS */
- const struct brw_program *tep = brw_program_const(brw->tess_eval_program);
-
- if (tep) {
- /* BRW_NEW_TES_PROG_DATA */
- const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data;
- _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_EVAL);
- gen6_upload_push_constants(brw, &tep->program, prog_data, stage_state);
- }
-
- gen7_upload_constant_state(brw, stage_state, tep, _3DSTATE_CONSTANT_DS);
-}
-
-const struct brw_tracked_state gen7_tes_push_constants = {
- .dirty = {
- .mesa = _NEW_PROGRAM_CONSTANTS,
- .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_PUSH_CONSTANT_ALLOCATION |
- BRW_NEW_TESS_PROGRAMS |
- BRW_NEW_TES_PROG_DATA,
- },
- .emit = gen7_upload_tes_push_constants,
-};
diff --git a/src/mesa/drivers/dri/i965/gen7_hs_state.c b/src/mesa/drivers/dri/i965/gen7_hs_state.c
deleted file mode 100644
index b4e325b2f8a..00000000000
--- a/src/mesa/drivers/dri/i965/gen7_hs_state.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright © 2014 Intel Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "brw_context.h"
-#include "brw_state.h"
-#include "brw_defines.h"
-#include "intel_batchbuffer.h"
-#include "main/shaderapi.h"
-
-static void
-gen7_upload_tcs_push_constants(struct brw_context *brw)
-{
- struct brw_stage_state *stage_state = &brw->tcs.base;
- /* BRW_NEW_TESS_PROGRAMS */
- const struct brw_program *tcp = brw_program_const(brw->tess_ctrl_program);
- bool active = brw->tess_eval_program;
-
- if (active) {
- /* BRW_NEW_TCS_PROG_DATA */
- const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data;
-
- _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_CTRL);
- gen6_upload_push_constants(brw, &tcp->program, prog_data, stage_state);
- }
-
- gen7_upload_constant_state(brw, stage_state, active, _3DSTATE_CONSTANT_HS);
-}
-
-const struct brw_tracked_state gen7_tcs_push_constants = {
- .dirty = {
- .mesa = _NEW_PROGRAM_CONSTANTS,
- .brw = BRW_NEW_BATCH |
- BRW_NEW_BLORP |
- BRW_NEW_DEFAULT_TESS_LEVELS |
- BRW_NEW_PUSH_CONSTANT_ALLOCATION |
- BRW_NEW_TESS_PROGRAMS |
- BRW_NEW_TCS_PROG_DATA,
- },
- .emit = gen7_upload_tcs_push_constants,
-};
diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
index dfd31e7a3b2..8d5bfea6320 100644
--- a/src/mesa/drivers/dri/i965/genX_state_upload.c
+++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
@@ -42,6 +42,7 @@
#include "main/fbobject.h"
#include "main/framebuffer.h"
#include "main/glformats.h"
+#include "main/shaderapi.h"
#include "main/stencil.h"
#include "main/transformfeedback.h"
#include "main/viewport.h"
@@ -101,6 +102,17 @@ render_bo(struct brw_bo *bo, uint32_t offset)
}
static inline struct brw_address
+render_ro_bo(struct brw_bo *bo, uint32_t offset)
+{
+ return (struct brw_address) {
+ .bo = bo,
+ .offset = offset,
+ .read_domains = I915_GEM_DOMAIN_RENDER,
+ .write_domain = 0,
+ };
+}
+
+static inline struct brw_address
instruction_bo(struct brw_bo *bo, uint32_t offset)
{
return (struct brw_address) {
@@ -1750,6 +1762,144 @@ static const struct brw_tracked_state genX(scissor_state) = {
.emit = genX(upload_scissor_state),
};
+#if GEN_GEN >= 7
+UNUSED static const uint32_t push_constant_opcodes[] = {
+ [MESA_SHADER_VERTEX] = 21,
+ [MESA_SHADER_TESS_CTRL] = 25, /* HS */
+ [MESA_SHADER_TESS_EVAL] = 26, /* DS */
+ [MESA_SHADER_GEOMETRY] = 22,
+ [MESA_SHADER_FRAGMENT] = 23,
+ [MESA_SHADER_COMPUTE] = 0,
+};
+
+static void
+upload_constant_state(struct brw_context *brw,
+ struct brw_stage_state *stage_state,
+ bool active, uint32_t stage)
+{
+ UNUSED uint32_t mocs = GEN_GEN < 8 ? GEN7_MOCS_L3 : 0;
+ active = active && stage_state->push_const_size != 0;
+
+ brw_batch_emit(brw, GENX(3DSTATE_CONSTANT_VS), pkt) {
+ pkt._3DCommandSubOpcode = push_constant_opcodes[stage];
+ if (active) {
+#if GEN_GEN >= 9
+ pkt.ConstantBody.ConstantBuffer2ReadLength =
+ stage_state->push_const_size;
+ pkt.ConstantBody.PointerToConstantBuffer2 =
+ render_ro_bo(brw->batch.bo, stage_state->push_const_offset);
+#else
+ pkt.ConstantBody.ConstantBuffer0ReadLength =
+ stage_state->push_const_size;
+ pkt.ConstantBody.PointerToConstantBuffer0.offset =
+ stage_state->push_const_offset | mocs;
+#endif
+ }
+ }
+
+ brw->ctx.NewDriverState |= GEN_GEN >= 9 ? BRW_NEW_SURFACES : 0;
+}
+#endif
+
+static void
+genX(upload_vs_push_constants)(struct brw_context *brw)
+{
+ struct brw_stage_state *stage_state = &brw->vs.base;
+
+ /* _BRW_NEW_VERTEX_PROGRAM */
+ const struct brw_program *vp = brw_program_const(brw->vertex_program);
+ /* BRW_NEW_VS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->vs.base.prog_data;
+
+ _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_VERTEX);
+ gen6_upload_push_constants(brw, &vp->program, prog_data, stage_state);
+
+#if GEN_GEN >= 7
+ if (GEN_GEN == 7 && !GEN_IS_HASWELL && !brw->is_baytrail)
+ gen7_emit_vs_workaround_flush(brw);
+
+ upload_constant_state(brw, stage_state, true /* active */,
+ MESA_SHADER_VERTEX);
+#endif
+}
+
+static const struct brw_tracked_state genX(vs_push_constants) = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM_CONSTANTS |
+ _NEW_TRANSFORM,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION |
+ BRW_NEW_VERTEX_PROGRAM |
+ BRW_NEW_VS_PROG_DATA,
+ },
+ .emit = genX(upload_vs_push_constants),
+};
+
+static void
+genX(upload_gs_push_constants)(struct brw_context *brw)
+{
+ struct brw_stage_state *stage_state = &brw->gs.base;
+
+ /* BRW_NEW_GEOMETRY_PROGRAM */
+ const struct brw_program *gp = brw_program_const(brw->geometry_program);
+
+ if (gp) {
+ /* BRW_NEW_GS_PROG_DATA */
+ struct brw_stage_prog_data *prog_data = brw->gs.base.prog_data;
+
+ _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_GEOMETRY);
+ gen6_upload_push_constants(brw, &gp->program, prog_data, stage_state);
+ }
+
+#if GEN_GEN >= 7
+ upload_constant_state(brw, stage_state, gp, MESA_SHADER_GEOMETRY);
+#endif
+}
+
+static const struct brw_tracked_state genX(gs_push_constants) = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM_CONSTANTS |
+ _NEW_TRANSFORM,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_GEOMETRY_PROGRAM |
+ BRW_NEW_GS_PROG_DATA |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION,
+ },
+ .emit = genX(upload_gs_push_constants),
+};
+
+static void
+genX(upload_wm_push_constants)(struct brw_context *brw)
+{
+ struct brw_stage_state *stage_state = &brw->wm.base;
+ /* BRW_NEW_FRAGMENT_PROGRAM */
+ const struct brw_program *fp = brw_program_const(brw->fragment_program);
+ /* BRW_NEW_FS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->wm.base.prog_data;
+
+ _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_FRAGMENT);
+
+ gen6_upload_push_constants(brw, &fp->program, prog_data, stage_state);
+
+#if GEN_GEN >= 7
+ upload_constant_state(brw, stage_state, true, MESA_SHADER_FRAGMENT);
+#endif
+}
+
+static const struct brw_tracked_state genX(wm_push_constants) = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM_CONSTANTS,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_FRAGMENT_PROGRAM |
+ BRW_NEW_FS_PROG_DATA |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION,
+ },
+ .emit = genX(upload_wm_push_constants),
+};
+
#endif
/* ---------------------------------------------------------------------- */
@@ -2426,6 +2576,68 @@ static const struct brw_tracked_state genX(te_state) = {
.emit = upload_te_state,
};
+/* ---------------------------------------------------------------------- */
+
+static void
+genX(upload_tes_push_constants)(struct brw_context *brw)
+{
+ struct brw_stage_state *stage_state = &brw->tes.base;
+ /* BRW_NEW_TESS_PROGRAMS */
+ const struct brw_program *tep = brw_program_const(brw->tess_eval_program);
+
+ if (tep) {
+ /* BRW_NEW_TES_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->tes.base.prog_data;
+ _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_EVAL);
+ gen6_upload_push_constants(brw, &tep->program, prog_data, stage_state);
+ }
+
+ upload_constant_state(brw, stage_state, tep, MESA_SHADER_TESS_EVAL);
+}
+
+static const struct brw_tracked_state genX(tes_push_constants) = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM_CONSTANTS,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION |
+ BRW_NEW_TESS_PROGRAMS |
+ BRW_NEW_TES_PROG_DATA,
+ },
+ .emit = genX(upload_tes_push_constants),
+};
+
+static void
+genX(upload_tcs_push_constants)(struct brw_context *brw)
+{
+ struct brw_stage_state *stage_state = &brw->tcs.base;
+ /* BRW_NEW_TESS_PROGRAMS */
+ const struct brw_program *tcp = brw_program_const(brw->tess_ctrl_program);
+ bool active = brw->tess_eval_program;
+
+ if (active) {
+ /* BRW_NEW_TCS_PROG_DATA */
+ const struct brw_stage_prog_data *prog_data = brw->tcs.base.prog_data;
+
+ _mesa_shader_write_subroutine_indices(&brw->ctx, MESA_SHADER_TESS_CTRL);
+ gen6_upload_push_constants(brw, &tcp->program, prog_data, stage_state);
+ }
+
+ upload_constant_state(brw, stage_state, active, MESA_SHADER_TESS_CTRL);
+}
+
+static const struct brw_tracked_state genX(tcs_push_constants) = {
+ .dirty = {
+ .mesa = _NEW_PROGRAM_CONSTANTS,
+ .brw = BRW_NEW_BATCH |
+ BRW_NEW_BLORP |
+ BRW_NEW_DEFAULT_TESS_LEVELS |
+ BRW_NEW_PUSH_CONSTANT_ALLOCATION |
+ BRW_NEW_TESS_PROGRAMS |
+ BRW_NEW_TCS_PROG_DATA,
+ },
+ .emit = genX(upload_tcs_push_constants),
+};
#endif
/* ---------------------------------------------------------------------- */
@@ -2726,6 +2938,7 @@ static const struct brw_tracked_state genX(ps_blend) = {
},
.emit = genX(upload_ps_blend)
};
+
#endif
/* ---------------------------------------------------------------------- */
@@ -2806,9 +3019,9 @@ genX(init_atoms)(struct brw_context *brw)
&gen6_color_calc_state, /* must do before cc unit */
&gen6_depth_stencil_state, /* must do before cc unit */
- &gen6_vs_push_constants, /* Before vs_state */
- &gen6_gs_push_constants, /* Before gs_state */
- &gen6_wm_push_constants, /* Before wm_state */
+ &genX(vs_push_constants), /* Before vs_state */
+ &genX(gs_push_constants), /* Before gs_state */
+ &genX(wm_push_constants), /* Before wm_state */
/* Surface state setup. Must come before the VS/WM unit. The binding
* table upload must be last.
@@ -2877,11 +3090,11 @@ genX(init_atoms)(struct brw_context *brw)
&brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
&brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
- &gen6_vs_push_constants, /* Before vs_state */
- &gen7_tcs_push_constants,
- &gen7_tes_push_constants,
- &gen6_gs_push_constants, /* Before gs_state */
- &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
+ &genX(vs_push_constants), /* Before vs_state */
+ &genX(tcs_push_constants),
+ &genX(tes_push_constants),
+ &genX(gs_push_constants), /* Before gs_state */
+ &genX(wm_push_constants), /* Before wm_surfaces and constant_buffer */
/* Surface state setup. Must come before the VS/WM unit. The binding
* table upload must be last.
@@ -2964,11 +3177,11 @@ genX(init_atoms)(struct brw_context *brw)
&brw_gs_image_surfaces, /* Before gs push/pull constants and binding table */
&brw_wm_image_surfaces, /* Before wm push/pull constants and binding table */
- &gen6_vs_push_constants, /* Before vs_state */
- &gen7_tcs_push_constants,
- &gen7_tes_push_constants,
- &gen6_gs_push_constants, /* Before gs_state */
- &gen6_wm_push_constants, /* Before wm_surfaces and constant_buffer */
+ &genX(vs_push_constants), /* Before vs_state */
+ &genX(tcs_push_constants),
+ &genX(tes_push_constants),
+ &genX(gs_push_constants), /* Before gs_state */
+ &genX(wm_push_constants), /* Before wm_surfaces and constant_buffer */
/* Surface state setup. Must come before the VS/WM unit. The binding
* table upload must be last.