diff options
author | Tom Stellard <[email protected]> | 2012-06-15 17:36:42 -0400 |
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committer | Tom Stellard <[email protected]> | 2012-06-18 18:30:36 -0400 |
commit | 34ff22b75f8e3616109c3deacea2ec27f12f3398 (patch) | |
tree | 8374117abd33d5beb326d254a5e53c968964c19e | |
parent | 440ab9ea02690008b4d8da11494fd1e9cd86e57e (diff) |
radeon/llvm: Eliminate getRegClassFromType() function
We can use TargetLowering::getRegClassFor() instead.
-rw-r--r-- | src/gallium/drivers/radeon/AMDILISelLowering.cpp | 43 |
1 files changed, 1 insertions, 42 deletions
diff --git a/src/gallium/drivers/radeon/AMDILISelLowering.cpp b/src/gallium/drivers/radeon/AMDILISelLowering.cpp index 892aaf4a3c1..3cc79452d43 100644 --- a/src/gallium/drivers/radeon/AMDILISelLowering.cpp +++ b/src/gallium/drivers/radeon/AMDILISelLowering.cpp @@ -413,47 +413,6 @@ CondCCodeToCC(ISD::CondCode CC, const MVT::SimpleValueType& type) }; } -/// Helper function used by LowerFormalArguments -static const TargetRegisterClass* -getRegClassFromType(unsigned int type) { - switch (type) { - default: - assert(0 && "Passed in type does not match any register classes."); - case MVT::i8: - return &AMDIL::GPRI8RegClass; - case MVT::i16: - return &AMDIL::GPRI16RegClass; - case MVT::i32: - return &AMDIL::GPRI32RegClass; - case MVT::f32: - return &AMDIL::GPRF32RegClass; - case MVT::i64: - return &AMDIL::GPRI64RegClass; - case MVT::f64: - return &AMDIL::GPRF64RegClass; - case MVT::v4f32: - return &AMDIL::GPRV4F32RegClass; - case MVT::v4i8: - return &AMDIL::GPRV4I8RegClass; - case MVT::v4i16: - return &AMDIL::GPRV4I16RegClass; - case MVT::v4i32: - return &AMDIL::GPRV4I32RegClass; - case MVT::v2f32: - return &AMDIL::GPRV2F32RegClass; - case MVT::v2i8: - return &AMDIL::GPRV2I8RegClass; - case MVT::v2i16: - return &AMDIL::GPRV2I16RegClass; - case MVT::v2i32: - return &AMDIL::GPRV2I32RegClass; - case MVT::v2f64: - return &AMDIL::GPRV2F64RegClass; - case MVT::v2i64: - return &AMDIL::GPRV2I64RegClass; - } -} - SDValue AMDILTargetLowering::LowerMemArgument( SDValue Chain, @@ -1514,7 +1473,7 @@ const CCValAssign &VA = ArgLocs[i]; if (VA.isRegLoc()) { EVT RegVT = VA.getLocVT(); - const TargetRegisterClass *RC = getRegClassFromType( + const TargetRegisterClass *RC = getRegClassFor( RegVT.getSimpleVT().SimpleTy); unsigned int Reg = MF.addLiveIn(VA.getLocReg(), RC); |