diff options
| author | Marcin Slusarz <[email protected]> | 2012-06-19 23:38:34 +0200 |
|---|---|---|
| committer | Marcin Slusarz <[email protected]> | 2012-06-20 21:24:53 +0200 |
| commit | 19fd04f5eaf76f6ea5effa69d91c415bba75ba8e (patch) | |
| tree | 45468a40cf531e83a5d774683cfac4c390551c8c | |
| parent | 7e63b613a5a067462c450338e0bdce5b5976f6f1 (diff) | |
nv50: fix buffer reuse issues
1) We need to insert a barrier between consecutive transform feedback calls.
2) VBO cache needs to be flushed when TFB output is used as VBO draw input.
Fixes Piglit test EXT_transform_feedback/immediate-reuse.
Thanks to Christoph Bumiller for pointing out bugs in previous versions
of this patch.
| -rw-r--r-- | src/gallium/drivers/nv50/nv50_shader_state.c | 6 | ||||
| -rw-r--r-- | src/gallium/drivers/nv50/nv50_vbo.c | 12 |
2 files changed, 18 insertions, 0 deletions
diff --git a/src/gallium/drivers/nv50/nv50_shader_state.c b/src/gallium/drivers/nv50/nv50_shader_state.c index 1ddcd3c67e7..586eefe50da 100644 --- a/src/gallium/drivers/nv50/nv50_shader_state.c +++ b/src/gallium/drivers/nv50/nv50_shader_state.c @@ -564,6 +564,12 @@ nv50_stream_output_validate(struct nv50_context *nv50) return; } + /* previous TFB needs to complete */ + if (nv50->screen->base.class_3d < NVA0_3D_CLASS) { + BEGIN_NV04(push, SUBC_3D(NV50_GRAPH_SERIALIZE), 1); + PUSH_DATA (push, 0); + } + ctrl = so->ctrl; if (nv50->screen->base.class_3d >= NVA0_3D_CLASS) ctrl |= NVA0_3D_STRMOUT_BUFFERS_CTRL_LIMIT_MODE_OFFSET; diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c index 1875d4d6092..6e81b7b2d34 100644 --- a/src/gallium/drivers/nv50/nv50_vbo.c +++ b/src/gallium/drivers/nv50/nv50_vbo.c @@ -293,6 +293,18 @@ nv50_vertex_arrays_validate(struct nv50_context *nv50) else nv50->vbo_fifo = 0; + if (!nv50->vbo_fifo) { + /* if vertex buffer was written by GPU - flush VBO cache */ + for (i = 0; i < nv50->num_vtxbufs; ++i) { + struct nv04_resource *buf = nv04_resource(nv50->vtxbuf[i].buffer); + if (buf && buf->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) { + buf->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING; + nv50->base.vbo_dirty = TRUE; + break; + } + } + } + /* update vertex format state */ BEGIN_NV04(push, NV50_3D(VERTEX_ARRAY_ATTRIB(0)), n); if (nv50->vbo_fifo) { |