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authorMarek Olšák <[email protected]>2020-03-10 20:46:16 -0400
committerMarge Bot <[email protected]>2020-03-12 17:27:23 +0000
commit09295e95eba6f015d1731b589070cf5bbef3d581 (patch)
treea2f1ee1de1db35b13d97cfe1b3b28e523e00c4d8
parent629b6ddd7106bd31ebb44308bd307be2a5bf6bd4 (diff)
radeonsi: tune primitive binning for small chips
same as PAL Acked-by: Pierre-Eric Pelloux-Prayer <[email protected]> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4143>
-rw-r--r--src/gallium/drivers/radeonsi/si_state_binning.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_binning.c b/src/gallium/drivers/radeonsi/si_state_binning.c
index aae18f03636..1251b53785b 100644
--- a/src/gallium/drivers/radeonsi/si_state_binning.c
+++ b/src/gallium/drivers/radeonsi/si_state_binning.c
@@ -485,7 +485,8 @@ void si_emit_dpbb_state(struct si_context *sctx)
G_02880C_DEPTH_BEFORE_SHADER(db_shader_control);
/* Disable DPBB when it's believed to be inefficient. */
- if (ps_can_kill &&
+ if (sscreen->info.num_render_backends > 4 &&
+ ps_can_kill &&
db_can_reject_z_trivially &&
sctx->framebuffer.state.zsbuf &&
dsa->db_can_write) {
@@ -546,8 +547,13 @@ void si_emit_dpbb_state(struct si_context *sctx)
/* Tuned for Raven. Vega might need different values. */
if (sscreen->info.has_dedicated_vram) {
- context_states_per_bin = 1;
- persistent_states_per_bin = 1;
+ if (sscreen->info.num_render_backends > 4) {
+ context_states_per_bin = 1;
+ persistent_states_per_bin = 1;
+ } else {
+ context_states_per_bin = 3;
+ persistent_states_per_bin = 8;
+ }
} else {
/* This is a workaround for:
* https://bugs.freedesktop.org/show_bug.cgi?id=110214