diff options
| author | Dave Airlie <[email protected]> | 2017-12-29 11:00:34 +1000 |
|---|---|---|
| committer | Juan A. Suarez Romero <[email protected]> | 2018-01-12 21:38:09 +0100 |
| commit | f82c02f1f18c16cabc47f203a3dc4300e7b5adc6 (patch) | |
| tree | b794c267dd6be890a71446ed7c923f6789188c44 | |
| parent | 419551fb27c30df71b8a6d809cab6a31c76fdd74 (diff) | |
radv/gfx9: use a bigger hammer to flush cb/db caches.
amdvlk is probably more subtle than this but it never uses
the inv cb/db variants, we fail some CTS tests without this.
Fixes:
dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.input*.
Fixes: c2fbeb7ca05 (radv: add GFX9 cache flushing support.)
Reviewed-by: Bas Nieuwenhuizen <[email protected]> (for now :-)
Signed-off-by: Dave Airlie <[email protected]>
(cherry picked from commit 868377ab33e09a211ddc9f0ca82b15e7b40dd95b)
| -rw-r--r-- | src/amd/vulkan/si_cmd_buffer.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c index 20144d39ea3..4b9e0f6deb7 100644 --- a/src/amd/vulkan/si_cmd_buffer.c +++ b/src/amd/vulkan/si_cmd_buffer.c @@ -988,6 +988,11 @@ si_cs_emit_cache_flush(struct radeon_winsys_cs *cs, if (chip_class >= GFX9 && flush_cb_db) { unsigned cb_db_event, tc_flags; +#if 0 + /* This breaks a bunch of: + dEQP-VK.renderpass.dedicated_allocation.formats.d32_sfloat_s8_uint.input*. + use the big hammer always. + */ /* Set the CB/DB flush event. */ switch (flush_cb_db) { case RADV_CMD_FLAG_FLUSH_AND_INV_CB: @@ -1000,7 +1005,9 @@ si_cs_emit_cache_flush(struct radeon_winsys_cs *cs, /* both CB & DB */ cb_db_event = V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT; } - +#else + cb_db_event = V_028A90_CACHE_FLUSH_AND_INV_TS_EVENT; +#endif /* TC | TC_WB = invalidate L2 data * TC_MD | TC_WB = invalidate L2 metadata * TC | TC_WB | TC_MD = invalidate L2 data & metadata |