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authorIan Romanick <[email protected]>2012-01-06 14:49:02 -0800
committerIan Romanick <[email protected]>2012-01-11 12:51:24 -0800
commitefdc8bf1894790a85c118881395a998cbae34c1a (patch)
tree08d1276a4b9aa40f0ca66dac0f0093b6959ea063
parent6c0df75803e1944f82a1468dcca47d23de82ea6b (diff)
i965: Don't calculate masks of used FS inputs
This previously enabled some optimizations in the fragment shader (interpolation, etc.) if some input components were always 0.0 or 1.0. However, this data was generated by analyzing Mesa IR. The next patch in this series removes generation of Mesa IR for GLSL paths. When we detect that case, just set the used mask to ~0 and circumvent the optimizations. Signed-off-by: Ian Romanick <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_vs_constval.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_vs_constval.c b/src/mesa/drivers/dri/i965/brw_vs_constval.c
index 9ce5ab379ea..5b26c7a6db4 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_constval.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_constval.c
@@ -195,6 +195,21 @@ static void calc_wm_input_sizes( struct brw_context *brw )
GLuint insn;
GLuint i;
+ /* Mesa IR is not generated for GLSL vertex shaders. If there's no Mesa
+ * IR, the code below cannot determine which output components are
+ * written. So, skip it and assume everything is written. This
+ * circumvents some optimizations in the fragment shader, but it guarantees
+ * that correct code is generated.
+ */
+ if (vp->program.Base.NumInstructions == 0) {
+ brw->wm.input_size_masks[0] = ~0;
+ brw->wm.input_size_masks[1] = ~0;
+ brw->wm.input_size_masks[2] = ~0;
+ brw->wm.input_size_masks[3] = ~0;
+ return;
+ }
+
+
memset(&t, 0, sizeof(t));
/* _NEW_LIGHT | _NEW_PROGRAM */