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authorNicolai Hähnle <[email protected]>2017-06-12 10:53:07 +0200
committerNicolai Hähnle <[email protected]>2017-06-19 12:07:05 +0200
commitb28938ffce0580e89e6012826900da2b6013b0df (patch)
tree3f4c46547a196f91d25cf3ca25af5b59c463983f
parent25e5534734b7de2a2359c42eeff5fd0c3c0507da (diff)
st/glsl_to_tgsi: use correct writemask when converting generic intrinsics
This fixes a bug when lowering ballotARB: previously, using writemask 0xf, emit_asm would create TGSI_OPCODE_BALLOT instructions that span two registers to cover 4 64-bit channels. This could trample over other a neighbouring temporary. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=101360 Cc: 17.1 <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
-rw-r--r--src/mesa/state_tracker/st_glsl_to_tgsi.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
index 24d417d6709..7852941acd2 100644
--- a/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
+++ b/src/mesa/state_tracker/st_glsl_to_tgsi.cpp
@@ -3978,6 +3978,8 @@ glsl_to_tgsi_visitor::visit_generic_intrinsic(ir_call *ir, unsigned op)
ir->return_deref->accept(this);
st_dst_reg dst = st_dst_reg(this->result);
+ dst.writemask = u_bit_consecutive(0, ir->return_deref->var->type->vector_elements);
+
st_src_reg src[4] = { undef_src, undef_src, undef_src, undef_src };
unsigned num_src = 0;
foreach_in_list(ir_rvalue, param, &ir->actual_parameters) {