diff options
| author | Rob Clark <[email protected]> | 2016-12-06 15:52:28 -0500 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2016-12-06 18:01:31 -0500 |
| commit | a9383ae6d6eb71d30433b0346367af63bc979d34 (patch) | |
| tree | 27d027231b680576f28b6c831ae9ddce9af1c253 | |
| parent | ec24f009caf60e47f772dc2cf66789fc464e30cf (diff) | |
freedreno/a5xx: fix draw packet size with index buffer
gpuaddr of idx buffer is now two dwords (64b).
Signed-off-by: Rob Clark <[email protected]>
| -rw-r--r-- | src/gallium/drivers/freedreno/a5xx/fd5_draw.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_draw.h b/src/gallium/drivers/freedreno/a5xx/fd5_draw.h index 677bedf4f1c..8ce70d308ad 100644 --- a/src/gallium/drivers/freedreno/a5xx/fd5_draw.h +++ b/src/gallium/drivers/freedreno/a5xx/fd5_draw.h @@ -53,7 +53,7 @@ fd5_draw(struct fd_batch *batch, struct fd_ringbuffer *ring, */ emit_marker5(ring, 7); - OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 6 : 3); + OUT_PKT7(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 7 : 3); if (vismode == USE_VISIBILITY) { /* leave vis mode blank for now, it will be patched up when * we know if we are binning or not |