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authorRoland Scheidegger <[email protected]>2008-10-16 16:23:47 +0200
committerRoland Scheidegger <[email protected]>2008-10-16 16:25:52 +0200
commit73e119363216b75243dce170f8afd5c2f9bfce50 (patch)
treedbce44d3ad9f3b920916aa0bc17d87c96a3e0050
parenta7b24ac02f80efd83e93b4597a2c0e5a6ba198fe (diff)
fix span issue with really old ddx and non-tcl r100 chips
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_screen.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c
index 05107dd2ada..5f32dd575e3 100644
--- a/src/mesa/drivers/dri/radeon/radeon_screen.c
+++ b/src/mesa/drivers/dri/radeon/radeon_screen.c
@@ -900,7 +900,7 @@ radeonCreateScreen( __DRIscreenPrivate *sPriv )
screen->depthHasSurface = (sPriv->ddx_version.major > 4) ||
/* these chips don't use tiled z without hyperz. So always pretend
we have set up a surface which will cause linear reads/writes */
- ((screen->chip_family & RADEON_CLASS_R100) &&
+ (IS_R100_CLASS(screen) &&
!(screen->chip_flags & RADEON_CHIPSET_TCL));
if ( dri_priv->textureSize == 0 ) {