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authorDave Airlie <[email protected]>2010-10-08 11:57:04 +1000
committerDave Airlie <[email protected]>2010-10-18 09:25:22 +1000
commit5b966f58e3d87fc271cc429be969cf98eec991ca (patch)
tree3f5685e6410479226ede33221939b52464856c27
parent7b3fa038830663de9bceded1b0dd2d64b8cf39c4 (diff)
r600g: set tiling bits in hw state
-rw-r--r--src/gallium/drivers/r600/r600_state.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c
index 2c0a2005cf7..00234f956aa 100644
--- a/src/gallium/drivers/r600/r600_state.c
+++ b/src/gallium/drivers/r600/r600_state.c
@@ -657,6 +657,10 @@ static struct pipe_sampler_view *r600_create_sampler_view(struct pipe_context *c
bo[1] = rbuffer->bo;
}
pitch = align(tmp->pitch_in_pixels[0], 8);
+ if (tmp->tiled) {
+ array_mode = tmp->array_mode;
+ tile_type = tmp->tile_type;
+ }
/* FIXME properly handle first level != 0 */
r600_pipe_state_add_reg(rstate, R_038000_RESOURCE0_WORD0,
@@ -957,6 +961,7 @@ static void r600_cb(struct r600_pipe_context *rctx, struct r600_pipe_state *rsta
swap = r600_translate_colorswap(rtex->resource.base.b.format);
color_info = S_0280A0_FORMAT(format) |
S_0280A0_COMP_SWAP(swap) |
+ S_0280A0_ARRAY_MODE(rtex->array_mode);
S_0280A0_BLEND_CLAMP(1) |
S_0280A0_NUMBER_TYPE(ntype);
if (desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)