diff options
| author | Rob Clark <[email protected]> | 2018-09-12 15:54:47 -0400 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2018-09-27 15:49:14 -0400 |
| commit | 49d22c2dfcebb794a0bc7d481ac11f8817e214b6 (patch) | |
| tree | 04e114fe5e437b53932c4d42725dd13bd8c23a02 | |
| parent | 6530fcc4a7fe6fa0d67ebc33b213e4497f634169 (diff) | |
freedreno/a6xx: fix shaders w/ >= 24 regs
Possibly these bits mean something else now. Blob always seems to use
FOUR_QUADS, and changing to TWO_QUADS seems to cause different threads
to overlap registers.
Signed-off-by: Rob Clark <[email protected]>
| -rw-r--r-- | src/gallium/drivers/freedreno/a6xx/fd6_program.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c index b2354de7e30..6ce02d63210 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c @@ -310,7 +310,7 @@ fd6_program_emit(struct fd_context *ctx, struct fd_ringbuffer *ring, setup_stages(emit, s); - fssz = (s[FS].i->max_reg >= 24) ? TWO_QUADS : FOUR_QUADS; + fssz = FOUR_QUADS; pos_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_POS); psize_regid = ir3_find_output_regid(s[VS].v, VARYING_SLOT_PSIZ); |