diff options
author | Ilia Mirkin <[email protected]> | 2017-04-07 20:17:47 -0400 |
---|---|---|
committer | Emil Velikov <[email protected]> | 2017-04-12 11:32:27 +0100 |
commit | 4900fa3f82fa98aa30ca06de5eefa0e84e889b12 (patch) | |
tree | d14d798e3ebb8257a2140fa01b28ffe5078b318d | |
parent | 29a7d73c9ceccc56c3b913b0655849702bd0f7fd (diff) |
nvc0/ir: fix LSB/BFE/BFI implementations
Overwriting the src register is a very bad idea - it logically maps onto
the TGSI registers, and so is effectively overwriting the source values.
Reported-by: Boyan Ding <[email protected]>
Signed-off-by: Ilia Mirkin <[email protected]>
Cc: [email protected]
(cherry picked from commit 60f5766db48fe81f55f4b7be47c2be27bdbe2c10)
-rw-r--r-- | src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp | 19 |
1 files changed, 11 insertions, 8 deletions
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp index 64bfd084326..f0c2866c8a2 100644 --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp @@ -3651,16 +3651,17 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn) case TGSI_OPCODE_UBFE: FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { src0 = fetchSrc(0, c); + val0 = getScratch(); if (tgsi.getSrc(1).getFile() == TGSI_FILE_IMMEDIATE && tgsi.getSrc(2).getFile() == TGSI_FILE_IMMEDIATE) { - src1 = loadImm(NULL, tgsi.getSrc(2).getValueU32(c, info) << 8 | - tgsi.getSrc(1).getValueU32(c, info)); + loadImm(val0, (tgsi.getSrc(2).getValueU32(c, info) << 8) | + tgsi.getSrc(1).getValueU32(c, info)); } else { src1 = fetchSrc(1, c); src2 = fetchSrc(2, c); - mkOp3(OP_INSBF, TYPE_U32, src1, src2, mkImm(0x808), src1); + mkOp3(OP_INSBF, TYPE_U32, val0, src2, mkImm(0x808), src1); } - mkOp2(OP_EXTBF, dstTy, dst0[c], src0, src1); + mkOp2(OP_EXTBF, dstTy, dst0[c], src0, val0); } break; case TGSI_OPCODE_BFI: @@ -3669,16 +3670,18 @@ Converter::handleInstruction(const struct tgsi_full_instruction *insn) src1 = fetchSrc(1, c); src2 = fetchSrc(2, c); src3 = fetchSrc(3, c); - mkOp3(OP_INSBF, TYPE_U32, src2, src3, mkImm(0x808), src2); - mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, src2, src0); + val0 = getScratch(); + mkOp3(OP_INSBF, TYPE_U32, val0, src3, mkImm(0x808), src2); + mkOp3(OP_INSBF, TYPE_U32, dst0[c], src1, val0, src0); } break; case TGSI_OPCODE_LSB: FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) { src0 = fetchSrc(0, c); - geni = mkOp2(OP_EXTBF, TYPE_U32, src0, src0, mkImm(0x2000)); + val0 = getScratch(); + geni = mkOp2(OP_EXTBF, TYPE_U32, val0, src0, mkImm(0x2000)); geni->subOp = NV50_IR_SUBOP_EXTBF_REV; - geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], src0); + geni = mkOp1(OP_BFIND, TYPE_U32, dst0[c], val0); geni->subOp = NV50_IR_SUBOP_BFIND_SAMT; } break; |