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authorMatt Turner <[email protected]>2017-08-25 15:52:27 -0700
committerMatt Turner <[email protected]>2017-10-04 14:08:37 -0700
commit2082c32950a9e3a4debc00b0d6da85404b923920 (patch)
tree58fb549c2efeb51c9133411b1db2f54caf670932
parentd4079353278b115ca4d6596fdc84a64915ab4524 (diff)
i965/fs: Don't apply POW/FDIV workaround on Gen10+
The documentation says it applies only to Gens 8 and 9. Reviewed-by: Scott D Phillips <[email protected]>
-rw-r--r--src/intel/compiler/brw_fs_generator.cpp1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index 6489cc0d38f..2622a919173 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1639,6 +1639,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
* and empirically this affects CHV as well.
*/
if (devinfo->gen >= 8 &&
+ devinfo->gen <= 9 &&
p->nr_insn > 1 &&
brw_inst_opcode(devinfo, brw_last_inst) == BRW_OPCODE_MATH &&
brw_inst_math_function(devinfo, brw_last_inst) == BRW_MATH_FUNCTION_POW &&