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authorBas Nieuwenhuizen <[email protected]>2017-11-27 01:02:42 +0100
committerBas Nieuwenhuizen <[email protected]>2017-12-18 09:31:02 +0100
commit1c3cda7d27750be0804137f9a9222828e57354b8 (patch)
tree51fc7fd1c625c82d7b3de7ffa3493e11a9ab74b3
parent52be440f48ac7c337f6604846bb6f0cfd88e7118 (diff)
radv: Add syncobj signal/reset/wait to winsys.
Reviewed-by: Dave Airlie <[email protected]>
-rw-r--r--src/amd/vulkan/radv_radeon_winsys.h4
-rw-r--r--src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c40
2 files changed, 44 insertions, 0 deletions
diff --git a/src/amd/vulkan/radv_radeon_winsys.h b/src/amd/vulkan/radv_radeon_winsys.h
index 2b815d9c5a9..e851c3edf86 100644
--- a/src/amd/vulkan/radv_radeon_winsys.h
+++ b/src/amd/vulkan/radv_radeon_winsys.h
@@ -274,6 +274,10 @@ struct radeon_winsys {
int (*create_syncobj)(struct radeon_winsys *ws, uint32_t *handle);
void (*destroy_syncobj)(struct radeon_winsys *ws, uint32_t handle);
+ void (*reset_syncobj)(struct radeon_winsys *ws, uint32_t handle);
+ void (*signal_syncobj)(struct radeon_winsys *ws, uint32_t handle);
+ bool (*wait_syncobj)(struct radeon_winsys *ws, uint32_t handle, uint64_t timeout);
+
int (*export_syncobj)(struct radeon_winsys *ws, uint32_t syncobj, int *fd);
int (*import_syncobj)(struct radeon_winsys *ws, int fd, uint32_t *syncobj);
diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
index e5ea312aeeb..e4d444b8524 100644
--- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
+++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -1281,6 +1281,43 @@ static void radv_amdgpu_destroy_syncobj(struct radeon_winsys *_ws,
amdgpu_cs_destroy_syncobj(ws->dev, handle);
}
+static void radv_amdgpu_reset_syncobj(struct radeon_winsys *_ws,
+ uint32_t handle)
+{
+ struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
+ amdgpu_cs_syncobj_reset(ws->dev, &handle, 1);
+}
+
+static void radv_amdgpu_signal_syncobj(struct radeon_winsys *_ws,
+ uint32_t handle)
+{
+ struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
+ amdgpu_cs_syncobj_signal(ws->dev, &handle, 1);
+}
+
+static bool radv_amdgpu_wait_syncobj(struct radeon_winsys *_ws,
+ uint32_t handle, uint64_t timeout)
+{
+ struct radv_amdgpu_winsys *ws = radv_amdgpu_winsys(_ws);
+ uint32_t tmp;
+
+ /* The timeouts are signed, while vulkan timeouts are unsigned. */
+ timeout = MIN2(timeout, INT64_MAX);
+
+ int ret = amdgpu_cs_syncobj_wait(ws->dev, &handle, 1, timeout,
+ DRM_SYNCOBJ_WAIT_FLAGS_WAIT_FOR_SUBMIT |
+ DRM_SYNCOBJ_WAIT_FLAGS_WAIT_ALL,
+ &tmp);
+ if (ret == 0) {
+ return true;
+ } else if (ret == -1 && errno == ETIME) {
+ return false;
+ } else {
+ fprintf(stderr, "amdgpu: radv_amdgpu_wait_syncobj failed!\nerrno: %d\n", errno);
+ return false;
+ }
+}
+
static int radv_amdgpu_export_syncobj(struct radeon_winsys *_ws,
uint32_t syncobj,
int *fd)
@@ -1319,6 +1356,9 @@ void radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsys *ws)
ws->base.destroy_sem = radv_amdgpu_destroy_sem;
ws->base.create_syncobj = radv_amdgpu_create_syncobj;
ws->base.destroy_syncobj = radv_amdgpu_destroy_syncobj;
+ ws->base.reset_syncobj = radv_amdgpu_reset_syncobj;
+ ws->base.signal_syncobj = radv_amdgpu_signal_syncobj;
+ ws->base.wait_syncobj = radv_amdgpu_wait_syncobj;
ws->base.export_syncobj = radv_amdgpu_export_syncobj;
ws->base.import_syncobj = radv_amdgpu_import_syncobj;
ws->base.fence_wait = radv_amdgpu_fence_wait;