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authorJason Ekstrand <[email protected]>2017-02-01 14:34:27 -0800
committerJason Ekstrand <[email protected]>2017-02-02 13:33:43 -0800
commitfc9f0db8e3ab04ee9a529ccd36fd8b2f6cbb47dd (patch)
treef4a91016f4b7f62dfd9a66d327be365ea6fffdec
parent7e6a9d9c4b59e84aad81c128ae3dce9d2f3d1167 (diff)
intel/isl: Assert that we don't use CCS for storage images
I enabled CCS for storage images in the Vulkan driver and ran it through the CTS. It didn't result in any hangs but it demonstrated that the data port cannot handle CCS. Reviewed-by: Samuel Iglesias Gonsálvez <[email protected]> Reviewed-by: Chad Versace <[email protected]> Reviewed-by: Anuj Phogat <[email protected]>
-rw-r--r--src/intel/isl/isl_surface_state.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index c7b220b73fb..29ec289a5d9 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -537,6 +537,12 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
#if GEN_GEN >= 7
if (info->aux_surf && info->aux_usage != ISL_AUX_USAGE_NONE) {
+ /* The docs don't appear to say anything whatsoever about compression
+ * and the data port. Testing seems to indicate that the data port
+ * completely ignores the AuxiliarySurfaceMode field.
+ */
+ assert(!(info->view->usage & ISL_SURF_USAGE_STORAGE_BIT));
+
struct isl_tile_info tile_info;
isl_surf_get_tile_info(dev, info->aux_surf, &tile_info);
uint32_t pitch_in_tiles =