diff options
author | Iago Toral Quiroga <[email protected]> | 2018-12-19 08:05:19 +0100 |
---|---|---|
committer | Iago Toral Quiroga <[email protected]> | 2018-12-20 08:02:44 +0100 |
commit | d6110d4d547ad98dce7a89d0e020ab5be5aaaad6 (patch) | |
tree | e632adae1c56e2d2818ecf555d4b15d2055bf68c | |
parent | 1250383e367fef6fdb954d69a7444634c6788f5d (diff) |
intel/compiler: move nir_lower_bool_to_int32 before nir_lower_locals_to_regs
The former expects to see SSA-only things, but the latter injects registers.
The assertions in the lowering where not seeing this because they asserted
on the bit_size values only, not on the is_ssa field, so add that assertion
too.
Fixes: 11dc1307794e "nir: Add a bool to int32 lowering pass"
CC: [email protected]
Reviewed-by: Jason Ekstrand <[email protected]>
-rw-r--r-- | src/compiler/nir/nir_lower_bool_to_int32.c | 2 | ||||
-rw-r--r-- | src/intel/compiler/brw_nir.c | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/src/compiler/nir/nir_lower_bool_to_int32.c b/src/compiler/nir/nir_lower_bool_to_int32.c index 064b27b9025..fdd2f55175d 100644 --- a/src/compiler/nir/nir_lower_bool_to_int32.c +++ b/src/compiler/nir/nir_lower_bool_to_int32.c @@ -46,6 +46,8 @@ lower_alu_instr(nir_alu_instr *alu) { const nir_op_info *op_info = &nir_op_infos[alu->op]; + assert(alu->dest.dest.is_ssa); + switch (alu->op) { case nir_op_imov: case nir_op_vec2: diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index ab88a5f1fc7..4fdc98b6cf4 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -832,6 +832,8 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler, OPT(nir_opt_dce); OPT(nir_opt_move_comparisons); + OPT(nir_lower_bool_to_int32); + OPT(nir_lower_locals_to_regs); if (unlikely(debug_enabled)) { @@ -846,8 +848,6 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler, nir_print_shader(nir, stderr); } - OPT(nir_lower_bool_to_int32); - OPT(nir_convert_from_ssa, true); if (!is_scalar) { |