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authorMarek Olšák <[email protected]>2017-02-01 02:00:05 +0100
committerMarek Olšák <[email protected]>2017-03-30 14:44:33 +0200
commitbe8eba062516c9767cb9e1b0c90ddc5f4700a8bf (patch)
tree55330b7b9694885055ffb0b566d14a325657b6d0
parent31b10422760bf743268d8a90fda406eac4069540 (diff)
radeonsi/gfx9: disable the 2-bit format fetch fix
Reviewed-by: Nicolai Hähnle <[email protected]>
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c8
1 files changed, 6 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index ae5aac0e465..b120e9a6836 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3342,6 +3342,7 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
unsigned count,
const struct pipe_vertex_element *elements)
{
+ struct si_screen *sscreen = (struct si_screen*)ctx->screen;
struct si_vertex_element *v = CALLOC_STRUCT(si_vertex_element);
bool used[SI_NUM_VERTEX_BUFFERS] = {};
int i;
@@ -3381,9 +3382,12 @@ static void *si_create_vertex_elements(struct pipe_context *ctx,
v->format_size[i] = desc->block.bits / 8;
/* The hardware always treats the 2-bit alpha channel as
- * unsigned, so a shader workaround is needed.
+ * unsigned, so a shader workaround is needed. The affected
+ * chips are VI and older except Stoney (GFX8.1).
*/
- if (data_format == V_008F0C_BUF_DATA_FORMAT_2_10_10_10) {
+ if (data_format == V_008F0C_BUF_DATA_FORMAT_2_10_10_10 &&
+ sscreen->b.chip_class <= VI &&
+ sscreen->b.family != CHIP_STONEY) {
if (num_format == V_008F0C_BUF_NUM_FORMAT_SNORM) {
v->fix_fetch[i] = SI_FIX_FETCH_A2_SNORM;
} else if (num_format == V_008F0C_BUF_NUM_FORMAT_SSCALED) {