diff options
| author | Marek Olšák <[email protected]> | 2018-08-24 22:57:17 -0400 |
|---|---|---|
| committer | Marek Olšák <[email protected]> | 2018-09-10 15:19:56 -0400 |
| commit | bc09c3d59e52136e975a6bb3e23b3178a8d485ce (patch) | |
| tree | 297e6792a347d404fec7e47b26e94dac661d2863 | |
| parent | a5f35aa742c3f1e2fae6a6c2fb53f92822f0cb70 (diff) | |
ac: add radeon_info::num_good_cu_per_sh
Tested-by: Dieter Nützel <[email protected]>
| -rw-r--r-- | src/amd/common/ac_gpu_info.c | 3 | ||||
| -rw-r--r-- | src/amd/common/ac_gpu_info.h | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 4 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_winsys.c | 4 |
4 files changed, 9 insertions, 3 deletions
diff --git a/src/amd/common/ac_gpu_info.c b/src/amd/common/ac_gpu_info.c index 8705d878f9a..bfaff45219f 100644 --- a/src/amd/common/ac_gpu_info.c +++ b/src/amd/common/ac_gpu_info.c @@ -414,6 +414,8 @@ bool ac_query_gpu_info(int fd, amdgpu_device_handle dev, for (j = 0; j < info->max_sh_per_se; j++) info->num_good_compute_units += util_bitcount(amdinfo->cu_bitmap[i][j]); + info->num_good_cu_per_sh = info->num_good_compute_units / + (info->max_se * info->max_sh_per_se); memcpy(info->si_tile_mode_array, amdinfo->gb_tile_mode, sizeof(amdinfo->gb_tile_mode)); @@ -543,6 +545,7 @@ void ac_print_gpu_info(struct radeon_info *info) printf("Shader core info:\n"); printf(" max_shader_clock = %i\n", info->max_shader_clock); printf(" num_good_compute_units = %i\n", info->num_good_compute_units); + printf(" num_good_cu_per_sh = %i\n", info->num_good_cu_per_sh); printf(" num_tcc_blocks = %i\n", info->num_tcc_blocks); printf(" max_se = %i\n", info->max_se); printf(" max_sh_per_se = %i\n", info->max_sh_per_se); diff --git a/src/amd/common/ac_gpu_info.h b/src/amd/common/ac_gpu_info.h index a897496da48..0583a6037f2 100644 --- a/src/amd/common/ac_gpu_info.h +++ b/src/amd/common/ac_gpu_info.h @@ -116,6 +116,7 @@ struct radeon_info { uint32_t r600_max_quad_pipes; /* wave size / 16 */ uint32_t max_shader_clock; uint32_t num_good_compute_units; + uint32_t num_good_cu_per_sh; uint32_t num_tcc_blocks; uint32_t max_se; /* shader engines */ uint32_t max_sh_per_se; /* shader arrays per shader engine */ diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index 40c478f0a46..bc1417aadfb 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -4928,9 +4928,7 @@ static void si_init_config(struct si_context *sctx) S_00B21C_CU_EN(0xffff) | S_00B21C_WAVE_LIMIT(0x3F)); /* Compute LATE_ALLOC_VS.LIMIT. */ - unsigned num_cu_per_sh = sscreen->info.num_good_compute_units / - (sscreen->info.max_se * - sscreen->info.max_sh_per_se); + unsigned num_cu_per_sh = sscreen->info.num_good_cu_per_sh; unsigned late_alloc_limit; /* The limit is per SH. */ if (sctx->family == CHIP_KABINI) { diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c index 19472a50ce1..3560c34c17a 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c @@ -525,6 +525,10 @@ static bool do_winsys_init(struct radeon_drm_winsys *ws) radeon_get_drm_value(ws->fd, RADEON_INFO_MAX_SH_PER_SE, NULL, &ws->info.max_sh_per_se); + if (ws->gen == DRV_SI) { + ws->info.num_good_cu_per_sh = ws->info.num_good_compute_units / + (ws->info.max_se * ws->info.max_sh_per_se); + } radeon_get_drm_value(ws->fd, RADEON_INFO_ACCEL_WORKING2, NULL, &ws->accel_working2); |