diff options
author | Neil Roberts <neil@linux.intel.com> | 2015-02-27 16:57:22 +0000 |
---|---|---|
committer | Neil Roberts <neil@linux.intel.com> | 2015-03-02 11:57:37 +0000 |
commit | aef8a4897937c0c06c7b01e39de23117a6e81d3e (patch) | |
tree | fe16fb6a64f7558afe909c461f1641fb439e0866 | |
parent | 27a34f62baa991eadd040302748c48b31ec21a0c (diff) |
i965/skl: Fix the maximum thread count format for the PS
According to the bspec for some reason the format of the maximum
number of threads field has changed from U8-2 to U8-1 for the PS.
Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
-rw-r--r-- | src/mesa/drivers/dri/i965/gen8_ps_state.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/gen8_ps_state.c b/src/mesa/drivers/dri/i965/gen8_ps_state.c index d4a58e4101e..5f39e12b89c 100644 --- a/src/mesa/drivers/dri/i965/gen8_ps_state.c +++ b/src/mesa/drivers/dri/i965/gen8_ps_state.c @@ -146,8 +146,13 @@ upload_ps_state(struct brw_context *brw) /* 3DSTATE_PS expects the number of threads per PSD, which is always 64; * it implicitly scales for different GT levels (which have some # of PSDs). + * + * In Gen8 the format is U8-2 whereas in Gen9 it is U8-1. */ - dw6 |= (64 - 2) << HSW_PS_MAX_THREADS_SHIFT; + if (brw->gen >= 9) + dw6 |= (64 - 1) << HSW_PS_MAX_THREADS_SHIFT; + else + dw6 |= (64 - 2) << HSW_PS_MAX_THREADS_SHIFT; if (prog_data->base.nr_params > 0) dw6 |= GEN7_PS_PUSH_CONSTANT_ENABLE; |