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authorJerome Glisse <[email protected]>2009-05-20 22:18:31 +0200
committerJerome Glisse <[email protected]>2009-05-20 22:19:40 +0200
commita13e96359baaa0331561f86ef6487feba6540464 (patch)
tree11533c664fb45cc57d42bf47cf32f4bd22932f17
parent01daeadf8cd8c56820585c3da88cc626dcdc33d0 (diff)
r200: fix vbo array rendering
-rw-r--r--src/mesa/drivers/dri/r200/r200_cmdbuf.c6
-rw-r--r--src/mesa/drivers/dri/radeon/radeon_dma.c3
2 files changed, 5 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/r200/r200_cmdbuf.c b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
index 0487c3fcf59..55ea81a57cf 100644
--- a/src/mesa/drivers/dri/r200/r200_cmdbuf.c
+++ b/src/mesa/drivers/dri/r200/r200_cmdbuf.c
@@ -148,12 +148,12 @@ static void r200FireEB(r200ContextPtr rmesa, int vertex_count, int type)
rmesa->radeon.tcl.elt_dma_bo,
rmesa->radeon.tcl.elt_dma_offset,
RADEON_GEM_DOMAIN_GTT, 0, 0);
- OUT_BATCH(vertex_count/2);
+ OUT_BATCH((vertex_count + 1)/2);
} else {
OUT_BATCH_PACKET3(R200_CP_CMD_INDX_BUFFER, 2);
OUT_BATCH((0x80 << 24) | (0 << 16) | 0x810);
OUT_BATCH(rmesa->radeon.tcl.elt_dma_offset);
- OUT_BATCH(vertex_count/2);
+ OUT_BATCH((vertex_count + 1)/2);
radeon_cs_write_reloc(rmesa->radeon.cmdbuf.cs,
rmesa->radeon.tcl.elt_dma_bo,
RADEON_GEM_DOMAIN_GTT, 0, 0);
@@ -173,8 +173,6 @@ void r200FlushElts(GLcontext *ctx)
assert( rmesa->radeon.dma.flush == r200FlushElts );
rmesa->radeon.dma.flush = NULL;
- elt_used = (elt_used + 2) & ~2;
-
nr = elt_used / 2;
radeon_bo_unmap(rmesa->radeon.tcl.elt_dma_bo);
diff --git a/src/mesa/drivers/dri/radeon/radeon_dma.c b/src/mesa/drivers/dri/radeon/radeon_dma.c
index 5ffee86e5a3..574e47ed302 100644
--- a/src/mesa/drivers/dri/radeon/radeon_dma.c
+++ b/src/mesa/drivers/dri/radeon/radeon_dma.c
@@ -319,6 +319,9 @@ void radeonReleaseArrays( GLcontext *ctx, GLuint newinputs )
radeonContextPtr radeon = RADEON_CONTEXT( ctx );
int i;
+ if (radeon->dma.flush) {
+ radeon->dma.flush(radeon->glCtx);
+ }
if (radeon->tcl.elt_dma_bo) {
radeon_bo_unref(radeon->tcl.elt_dma_bo);
radeon->tcl.elt_dma_bo = NULL;