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authorKenneth Graunke <[email protected]>2019-03-09 00:42:54 -0800
committerKenneth Graunke <[email protected]>2019-03-11 15:04:08 -0700
commit9302414f8b0e4d767b6435290ddb8d349f3ab12f (patch)
treeed78f84e47b6962211d8176cec7165c4e87b9267
parent076a7095bb46cd11ac1938be1652f5fdf862467b (diff)
iris: Move depth/stencil flushes so they actually do something
Commit d6dd57d43cd (iris: Add missing depth cache flushes) added the depth/stencil flushes to the wrong place. I meant to add them to the iris_upload_dirty_render_state code that emits the packets, but I accidentally added them to the nearly identical looking code in iris_restore_render_saved_bos. This meant we missed the actual flushing at draw time, but instead did pointless flushing on the first draw in a batch where things are already flushed anyway. This commit moves them to iris_resolve.c, next to the depth prepares, similar to what we do for color buffers. i965 does them elsewhere, but I'm not sure why - this seems like the most consistent place.
-rw-r--r--src/gallium/drivers/iris/iris_resolve.c5
-rw-r--r--src/gallium/drivers/iris/iris_state.c4
2 files changed, 5 insertions, 4 deletions
diff --git a/src/gallium/drivers/iris/iris_resolve.c b/src/gallium/drivers/iris/iris_resolve.c
index 6989f89aa21..7262c252afc 100644
--- a/src/gallium/drivers/iris/iris_resolve.c
+++ b/src/gallium/drivers/iris/iris_resolve.c
@@ -176,6 +176,11 @@ iris_predraw_resolve_framebuffer(struct iris_context *ice,
if (z_res) {
iris_resource_prepare_depth(ice, batch, z_res, zs_surf->u.tex.level,
zs_surf->u.tex.first_layer, num_layers);
+ iris_cache_flush_for_depth(batch, z_res->bo);
+ }
+
+ if (s_res) {
+ iris_cache_flush_for_depth(batch, s_res->bo);
}
}
diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c
index d00186d6657..a686188f701 100644
--- a/src/gallium/drivers/iris/iris_state.c
+++ b/src/gallium/drivers/iris/iris_state.c
@@ -4069,8 +4069,6 @@ iris_restore_render_saved_bos(struct iris_context *ice,
iris_get_depth_stencil_resources(cso_fb->zsbuf->texture,
&zres, &sres);
if (zres) {
- iris_cache_flush_for_depth(batch, zres->bo);
-
iris_use_pinned_bo(batch, zres->bo,
ice->state.depth_writes_enabled);
if (zres->aux.bo) {
@@ -4080,8 +4078,6 @@ iris_restore_render_saved_bos(struct iris_context *ice,
}
if (sres) {
- iris_cache_flush_for_depth(batch, sres->bo);
-
iris_use_pinned_bo(batch, sres->bo,
ice->state.stencil_writes_enabled);
}