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authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2017-03-30 19:57:43 +0200
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>2017-04-01 18:07:49 +0200
commit8a3ef8c65d9125012d32522eef58e5fc5c0b086a (patch)
treeabf8a4da54c68e486fa84ab7f9d59c3422c07640
parent8b10bf273d087fd648a4d622174b4b81c7e4a7bb (diff)
gallivm: add lp_build_emit_fetch_src() helper
lp_build_emit_fetch() is useful when the source type can be infered from the instruction opcode. However, for bindless samplers/images we can't do that easily because tgsi_opcode_infer_src_type() returns TGSI_TYPE_FLOAT for TEX instructions, while we need TGSI_TYPE_UNSIGNED64 if the resource register is bindless. Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Reviewed-by: Marek Olšák <marek.olsak@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi.c22
-rw-r--r--src/gallium/auxiliary/gallivm/lp_bld_tgsi.h7
2 files changed, 24 insertions, 5 deletions
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
index d368f38d098..69863ab93c9 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.c
@@ -323,16 +323,14 @@ lp_build_tgsi_inst_llvm(
LLVMValueRef
-lp_build_emit_fetch(
+lp_build_emit_fetch_src(
struct lp_build_tgsi_context *bld_base,
- const struct tgsi_full_instruction *inst,
- unsigned src_op,
+ const struct tgsi_full_src_register *reg,
+ enum tgsi_opcode_type stype,
const unsigned chan_index)
{
- const struct tgsi_full_src_register *reg = &inst->Src[src_op];
unsigned swizzle;
LLVMValueRef res;
- enum tgsi_opcode_type stype = tgsi_opcode_infer_src_type(inst->Instruction.Opcode);
if (chan_index == LP_CHAN_ALL) {
swizzle = ~0u;
@@ -413,7 +411,21 @@ lp_build_emit_fetch(
}
return res;
+}
+
+
+LLVMValueRef
+lp_build_emit_fetch(
+ struct lp_build_tgsi_context *bld_base,
+ const struct tgsi_full_instruction *inst,
+ unsigned src_op,
+ const unsigned chan_index)
+{
+ const struct tgsi_full_src_register *reg = &inst->Src[src_op];
+ enum tgsi_opcode_type stype =
+ tgsi_opcode_infer_src_type(inst->Instruction.Opcode);
+ return lp_build_emit_fetch_src(bld_base, reg, stype, chan_index);
}
diff --git a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
index a9f3d449e74..eb632b700ab 100644
--- a/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
+++ b/src/gallium/auxiliary/gallivm/lp_bld_tgsi.h
@@ -643,6 +643,13 @@ lp_build_tgsi_inst_llvm(
const struct tgsi_full_instruction *inst);
LLVMValueRef
+lp_build_emit_fetch_src(
+ struct lp_build_tgsi_context *bld_base,
+ const struct tgsi_full_src_register *reg,
+ enum tgsi_opcode_type stype,
+ const unsigned chan_index);
+
+LLVMValueRef
lp_build_emit_fetch(
struct lp_build_tgsi_context *bld_base,
const struct tgsi_full_instruction *inst,