diff options
author | Kenneth Graunke <[email protected]> | 2011-04-09 00:32:46 -0700 |
---|---|---|
committer | Kenneth Graunke <[email protected]> | 2011-05-17 23:33:00 -0700 |
commit | 482e8a6cd59292c58b11a9282632aaa9b24f44ae (patch) | |
tree | 8971eb2baf63f0281731881c2f628c4727727c21 | |
parent | 550ad737f77cfae9abf2db1638711713ad9d920e (diff) |
i965: Mad hacks to avoid using MRFs on Ivybridge.
Ivybridge's SEND instruction uses GRFs instead of MRFs. Unfortunately,
a lot of our code explicitly uses MRFs, and rewriting it would take a
fair bit of effort. In the meantime, use a hack:
- Change brw_set_dest, brw_set_src0, and brw_set_src1 to implicitly
convert any MRFs into the top 16 GRFs.
- Enable gen6_resolve_implied_move on Ivybridge: Moving g0 to m0
actually moves it to g111 thanks to the previous hack.
It remains to officially reserve these registers so the allocator
doesn't try to reuse them.
Signed-off-by: Kenneth Graunke <[email protected]>
Reviewed-by: Eric Anholt <[email protected]>
-rw-r--r-- | src/mesa/drivers/dri/i965/brw_eu_emit.c | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c b/src/mesa/drivers/dri/i965/brw_eu_emit.c index 13c925d8227..7372f947f6f 100644 --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c @@ -64,7 +64,7 @@ gen6_resolve_implied_move(struct brw_compile *p, GLuint msg_reg_nr) { struct intel_context *intel = &p->brw->intel; - if (intel->gen != 6) + if (intel->gen < 6) return; if (src->file != BRW_ARCHITECTURE_REGISTER_FILE || src->nr != BRW_ARF_NULL) { @@ -78,15 +78,29 @@ gen6_resolve_implied_move(struct brw_compile *p, *src = brw_message_reg(msg_reg_nr); } +static void +gen7_convert_mrf_to_grf(struct brw_compile *p, struct brw_reg *reg) +{ + struct intel_context *intel = &p->brw->intel; + if (intel->gen == 7 && reg->file == BRW_MESSAGE_REGISTER_FILE) { + reg->file = BRW_GENERAL_REGISTER_FILE; + reg->nr += 111; + } +} + static void brw_set_dest(struct brw_compile *p, struct brw_instruction *insn, struct brw_reg dest) { + struct intel_context *intel = &p->brw->intel; + if (dest.file != BRW_ARCHITECTURE_REGISTER_FILE && dest.file != BRW_MESSAGE_REGISTER_FILE) assert(dest.nr < 128); + gen7_convert_mrf_to_grf(p, &dest); + insn->bits1.da1.dest_reg_file = dest.file; insn->bits1.da1.dest_reg_type = dest.type; insn->bits1.da1.dest_address_mode = dest.address_mode; @@ -216,6 +230,8 @@ static void brw_set_src0(struct brw_compile *p, if (reg.type != BRW_ARCHITECTURE_REGISTER_FILE) assert(reg.nr < 128); + gen7_convert_mrf_to_grf(p, ®); + validate_reg(insn, reg); insn->bits1.da1.src0_reg_file = reg.file; @@ -294,6 +310,8 @@ void brw_set_src1(struct brw_compile *p, assert(reg.nr < 128); + gen7_convert_mrf_to_grf(p, ®); + validate_reg(insn, reg); insn->bits1.da1.src1_reg_file = reg.file; |