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authorMatt Turner <[email protected]>2014-09-27 17:34:51 -0700
committerMatt Turner <[email protected]>2014-09-30 17:09:34 -0700
commit05586f9bc1c5649298675361556936e684ad68eb (patch)
tree7f14e7bc9b48cecaae3e01e12e3b885d2501ff8e
parent94b68109fbe1cb60cc23a4c5a319039ada81ea81 (diff)
i965/fs: Set MUL source type to W/UW in 64-bit mul macro on Gen8.
Reviewed-by: Ian Romanick <[email protected]>
-rw-r--r--src/mesa/drivers/dri/i965/brw_fs_visitor.cpp23
1 files changed, 22 insertions, 1 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 89ac7e28828..6b4104556ba 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -654,8 +654,29 @@ fs_visitor::visit(ir_expression *ir)
struct brw_reg acc = retype(brw_acc_reg(dispatch_width),
this->result.type);
- emit(MUL(acc, op[0], op[1]));
+ fs_inst *mul = emit(MUL(acc, op[0], op[1]));
emit(MACH(this->result, op[0], op[1]));
+
+ /* Until Gen8, integer multiplies read 32-bits from one source, and
+ * 16-bits from the other, and relying on the MACH instruction to
+ * generate the high bits of the result.
+ *
+ * On Gen8, the multiply instruction does a full 32x32-bit multiply,
+ * but in order to do a 64x64-bit multiply we have to simulate the
+ * previous behavior and then use a MACH instruction.
+ *
+ * FINISHME: Don't use source modifiers on src1.
+ */
+ if (brw->gen >= 8) {
+ assert(mul->src[1].type == BRW_REGISTER_TYPE_D ||
+ mul->src[1].type == BRW_REGISTER_TYPE_UD);
+ if (mul->src[1].type == BRW_REGISTER_TYPE_D) {
+ mul->src[1].type = BRW_REGISTER_TYPE_W;
+ } else {
+ mul->src[1].type = BRW_REGISTER_TYPE_UW;
+ }
+ }
+
break;
}
case ir_binop_div: