diff options
author | Brian <[email protected]> | 2007-03-28 14:23:33 -0600 |
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committer | Brian <[email protected]> | 2007-03-28 14:23:33 -0600 |
commit | 3e7d43cd480203f0f861345776454628df0d9a42 (patch) | |
tree | 1450c668c4dfa5cbe8ab2605812ca63f4f965249 | |
parent | 1bbd69251b2738428795c06bb19c3a21797d6846 (diff) |
Get rid of BRK0, BRK1, CONT0, CONT1 instructions.
-rw-r--r-- | src/mesa/shader/prog_execute.c | 26 | ||||
-rw-r--r-- | src/mesa/shader/prog_instruction.c | 4 | ||||
-rw-r--r-- | src/mesa/shader/prog_instruction.h | 4 | ||||
-rw-r--r-- | src/mesa/shader/prog_print.c | 11 | ||||
-rw-r--r-- | src/mesa/tnl/t_vb_arbprogram.c | 4 |
5 files changed, 0 insertions, 49 deletions
diff --git a/src/mesa/shader/prog_execute.c b/src/mesa/shader/prog_execute.c index 7908976b60d..013d65ce869 100644 --- a/src/mesa/shader/prog_execute.c +++ b/src/mesa/shader/prog_execute.c @@ -727,32 +727,6 @@ _mesa_execute_program(GLcontext * ctx, pc = inst->BranchTarget - 1; } break; - case OPCODE_BRK0: /* Break if zero */ - /* fall-through */ - case OPCODE_CONT0: /* Continue if zero */ - { - GLfloat a[4]; - fetch_vector1(&inst->SrcReg[0], machine, a); - if (a[0] == 0.0) { - /* take branch */ - /* Subtract 1 here since we'll do pc++ at end of for-loop */ - pc = inst->BranchTarget - 1; - } - } - break; - case OPCODE_BRK1: /* Break if non-zero */ - /* fall-through */ - case OPCODE_CONT1: /* Continue if non-zero */ - { - GLfloat a[4]; - fetch_vector1(&inst->SrcReg[0], machine, a); - if (a[0] != 0.0) { - /* take branch */ - /* Subtract 1 here since we'll do pc++ at end of for-loop */ - pc = inst->BranchTarget - 1; - } - } - break; case OPCODE_CAL: /* Call subroutine (conditional) */ if (eval_condition(machine, inst)) { /* call the subroutine */ diff --git a/src/mesa/shader/prog_instruction.c b/src/mesa/shader/prog_instruction.c index 272caf6c746..1e8e0812262 100644 --- a/src/mesa/shader/prog_instruction.c +++ b/src/mesa/shader/prog_instruction.c @@ -138,13 +138,9 @@ static const struct instruction_info InstInfo[MAX_OPCODE] = { { OPCODE_BGNSUB, "BGNSUB", 0 }, { OPCODE_BRA, "BRA", 0 }, { OPCODE_BRK, "BRK", 0 }, - { OPCODE_BRK0, "BRK0", 1 }, - { OPCODE_BRK1, "BRK1", 1 }, { OPCODE_CAL, "CAL", 0 }, { OPCODE_CMP, "CMP", 3 }, { OPCODE_CONT, "CONT", 0 }, - { OPCODE_CONT0, "CONT0", 1 }, - { OPCODE_CONT1, "CONT1", 1 }, { OPCODE_COS, "COS", 1 }, { OPCODE_DDX, "DDX", 1 }, { OPCODE_DDY, "DDY", 1 }, diff --git a/src/mesa/shader/prog_instruction.h b/src/mesa/shader/prog_instruction.h index dc2d2dc29b4..c800757aa0f 100644 --- a/src/mesa/shader/prog_instruction.h +++ b/src/mesa/shader/prog_instruction.h @@ -153,13 +153,9 @@ typedef enum prog_opcode { OPCODE_BGNSUB, /* opt */ OPCODE_BRA, /* 2 X */ OPCODE_BRK, /* 2 opt */ - OPCODE_BRK0, /* opt */ - OPCODE_BRK1, /* opt */ OPCODE_CAL, /* 2 2 */ OPCODE_CMP, /* X */ OPCODE_CONT, /* opt */ - OPCODE_CONT0, /* opt */ - OPCODE_CONT1, /* opt */ OPCODE_COS, /* X 2 X X */ OPCODE_DDX, /* X X */ OPCODE_DDY, /* X X */ diff --git a/src/mesa/shader/prog_print.c b/src/mesa/shader/prog_print.c index a43bebb77aa..e92837f739e 100644 --- a/src/mesa/shader/prog_print.c +++ b/src/mesa/shader/prog_print.c @@ -606,17 +606,6 @@ _mesa_print_instruction_opt(const struct prog_instruction *inst, GLint indent, print_comment(inst); break; - case OPCODE_BRK0: - case OPCODE_BRK1: - case OPCODE_CONT0: - case OPCODE_CONT1: - _mesa_printf("%s ", _mesa_opcode_string(inst->Opcode)); - print_src_reg(&inst->SrcReg[0], mode, prog); - _mesa_printf("; "); - _mesa_printf(" # (goto %d)", inst->BranchTarget); - print_comment(inst); - break; - case OPCODE_BGNSUB: if (mode == PROG_PRINT_NV) { _mesa_printf("%s:\n", inst->Comment); /* comment is label */ diff --git a/src/mesa/tnl/t_vb_arbprogram.c b/src/mesa/tnl/t_vb_arbprogram.c index f0e326f25c4..2edb1c5ac4c 100644 --- a/src/mesa/tnl/t_vb_arbprogram.c +++ b/src/mesa/tnl/t_vb_arbprogram.c @@ -741,13 +741,9 @@ static gpu_function opcode_func[MAX_OPCODE+3] = do_NOP,/*BGNSUB*/ do_NOP,/*BRA*/ do_NOP,/*BRK*/ - do_NOP,/*BRK0*/ - do_NOP,/*BRK1*/ do_NOP,/*CAL*/ do_NOP,/*CMP*/ do_NOP,/*CONT*/ - do_NOP,/*CONT0*/ - do_NOP,/*CONT1*/ do_NOP,/*COS*/ do_NOP,/*DDX*/ do_NOP,/*DDY*/ |